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Searched refs:latch (Results 1 – 25 of 42) sorted by relevance

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/Linux-v6.6/Documentation/driver-api/surface_aggregator/clients/
Ddtx.rst58 The latch mechanism has two major states: *open* and *closed*. In the
62 The latch can additionally be locked and, correspondingly, unlocked, which
66 documentation for the detachment procedure below. By default, the latch is
82 instructions/commands. In case the latch is unlocked, the led will flash
83 green. If the latch has been locked, the led will be solid red
93 - If the latch is unlocked, the EC will open the latch and the clipboard
98 - If the latch is locked, the EC will *not* open the latch, meaning the
111 latch, after which the user can separate clipboard and base.
113 As this changes the latch state, a *latch-status* event
114 (``SDTX_EVENT_LATCH_STATUS``) will be sent once the latch has been opened
[all …]
/Linux-v6.6/drivers/clk/ti/
Dmux.c81 ti_clk_latch(&mux->reg, mux->latch); in ti_clk_mux_set_parent()
125 s8 latch, u8 clk_mux_flags, u32 *table) in _register_mux() argument
146 mux->latch = latch; in _register_mux()
175 s32 latch = -EINVAL; in of_mux_clk_setup() local
194 of_property_read_u32(node, "ti,latch-bit", &latch); in of_mux_clk_setup()
211 flags, &reg, shift, mask, latch, clk_mux_flags, in of_mux_clk_setup()
235 mux->latch = -EINVAL; in ti_clk_build_component_mux()
Dclk.c338 u32 latch; in ti_clk_latch() local
343 latch = 1 << shift; in ti_clk_latch()
345 ti_clk_ll_ops->clk_rmw(latch, latch, reg); in ti_clk_latch()
346 ti_clk_ll_ops->clk_rmw(0, latch, reg); in ti_clk_latch()
Dclock.h16 s8 latch; member
32 s8 latch; member
Ddivider.c261 ti_clk_latch(&divider->reg, divider->latch); in ti_clk_divider_set_rate()
492 div->latch = val; in ti_clk_divider_populate()
494 div->latch = -EINVAL; in ti_clk_divider_populate()
/Linux-v6.6/drivers/gpio/
Dgpio-latch.c78 int latch = offset / priv->n_latched_gpios; in gpio_latch_set_unlocked() local
85 test_bit(latch * priv->n_latched_gpios + i, priv->shadow)); in gpio_latch_set_unlocked()
88 set(priv->clk_gpios->desc[latch], 1); in gpio_latch_set_unlocked()
90 set(priv->clk_gpios->desc[latch], 0); in gpio_latch_set_unlocked()
/Linux-v6.6/drivers/pcmcia/
Dtcic.c532 u_char latch, sstat; in tcic_interrupt() local
550 latch = sstat ^ socket_table[psock].last_sstat; in tcic_interrupt()
556 if (latch == 0) in tcic_interrupt()
558 events = (latch & TCIC_SSTAT_CD) ? SS_DETECT : 0; in tcic_interrupt()
559 events |= (latch & TCIC_SSTAT_WP) ? SS_WRPROT : 0; in tcic_interrupt()
561 events |= (latch & TCIC_SSTAT_LBAT1) ? SS_STSCHG : 0; in tcic_interrupt()
563 events |= (latch & TCIC_SSTAT_RDY) ? SS_READY : 0; in tcic_interrupt()
564 events |= (latch & TCIC_SSTAT_LBAT1) ? SS_BATDEAD : 0; in tcic_interrupt()
565 events |= (latch & TCIC_SSTAT_LBAT2) ? SS_BATWARN : 0; in tcic_interrupt()
/Linux-v6.6/Documentation/devicetree/bindings/clock/
Darmada3700-xtal-clock.txt4 reading the gpio latch register.
7 of the GPIO block where the gpio latch is located.
/Linux-v6.6/drivers/clocksource/
Dtimer-ixp4xx.c48 u32 latch; member
138 val = tmr->latch & ~IXP4XX_OST_RELOAD_MASK; in ixp4xx_set_periodic()
180 tmr->latch = DIV_ROUND_CLOSEST(timer_freq, in ixp4xx_timer_register()
/Linux-v6.6/kernel/time/
Dclockevents.c32 static u64 cev_delta2ns(unsigned long latch, struct clock_event_device *evt, in cev_delta2ns() argument
35 u64 clc = (u64) latch << evt->shift; in cev_delta2ns()
46 if ((clc >> evt->shift) != (u64)latch) in cev_delta2ns()
85 u64 clockevent_delta2ns(unsigned long latch, struct clock_event_device *evt) in clockevent_delta2ns() argument
87 return cev_delta2ns(latch, evt, false); in clockevent_delta2ns()
/Linux-v6.6/arch/x86/kernel/
Dtsc.c425 static unsigned long pit_calibrate_tsc(u32 latch, unsigned long ms, int loopmin) in pit_calibrate_tsc() argument
454 outb(latch & 0xff, 0x42); in pit_calibrate_tsc()
455 outb(latch >> 8, 0x42); in pit_calibrate_tsc()
757 unsigned long flags, latch, ms; in pit_hpet_ptimer_calibrate_cpu() local
786 latch = CAL_LATCH; in pit_hpet_ptimer_calibrate_cpu()
801 tsc_pit_khz = pit_calibrate_tsc(latch, ms, loopmin); in pit_hpet_ptimer_calibrate_cpu()
847 latch = CAL2_LATCH; in pit_hpet_ptimer_calibrate_cpu()
/Linux-v6.6/Documentation/devicetree/bindings/mtd/
Dfsl-upm-nand.txt6 - fsl,upm-addr-offset : UPM pattern offset for the address latch.
7 - fsl,upm-cmd-offset : UPM pattern offset for the command latch.
Datmel-nand.txt133 - atmel,nand-addr-offset : offset for the address latch.
134 - atmel,nand-cmd-offset : offset for the command latch.
/Linux-v6.6/arch/arm/boot/dts/ti/omap/
Ddra76x.dtsi94 ti,latch-bit = <26>;
105 ti,latch-bit = <26>;
/Linux-v6.6/Documentation/devicetree/bindings/clock/ti/
Dmux.txt52 - ti,latch-bit : latch the mux value to HW, only needed if the register
Ddivider.txt78 - ti,latch-bit : latch the divider value to HW, only needed if the register
/Linux-v6.6/drivers/platform/surface/
Dsurface_dtx.c319 u8 latch; in sdtx_ioctl_get_latch_status() local
324 status = ssam_retry(ssam_bas_get_latch_status, ddev->ctrl, &latch); in sdtx_ioctl_get_latch_status()
328 return put_user(sdtx_translate_latch_status(ddev, latch), buf); in sdtx_ioctl_get_latch_status()
879 u8 mode, latch; in sdtx_device_state_workfn() local
907 status = ssam_retry(ssam_bas_get_latch_status, ddev->ctrl, &latch); in sdtx_device_state_workfn()
930 __sdtx_device_state_update_latch(ddev, latch); in sdtx_device_state_workfn()
/Linux-v6.6/Documentation/hwmon/
Dadm9240.rst178 a 20 ms active low pulse to reset an external Chassis Intrusion latch.
180 Clear the CI latch by writing value 0 to the sysfs intrusion0_alarm file.
200 that alarm bits may be cleared on read, user-space may latch alarms and
/Linux-v6.6/include/linux/
Dclockchips.h182 extern u64 clockevent_delta2ns(unsigned long latch, struct clock_event_device *evt);
/Linux-v6.6/Documentation/virt/kvm/devices/
Darm-vgic-v3.rst149 here is that of the latch which is set by ISPENDR and cleared by ICPENDR or
151 ISPENDR is the logical OR of the latch value and the input line level.
153 Raw access to the latch state is provided to userspace so that it can save
155 combination of the current input line level and the latch state, and cannot
/Linux-v6.6/drivers/md/
Ddm.c131 int latch = READ_ONCE(swap_bios); in get_swap_bios() local
133 if (unlikely(latch <= 0)) in get_swap_bios()
134 latch = DEFAULT_SWAP_BIOS; in get_swap_bios()
135 return latch; in get_swap_bios()
1378 static noinline void __set_swap_bios_limit(struct mapped_device *md, int latch) in __set_swap_bios_limit() argument
1381 while (latch < md->swap_bios) { in __set_swap_bios_limit()
1386 while (latch > md->swap_bios) { in __set_swap_bios_limit()
1411 int latch = get_swap_bios(); in __map_bio() local
1413 if (unlikely(latch != md->swap_bios)) in __map_bio()
1414 __set_swap_bios_limit(md, latch); in __map_bio()
/Linux-v6.6/kernel/printk/
Dprintk.c456 seqcount_latch_t latch; member
466 .latch = SEQCNT_LATCH_ZERO(clear_seq.latch),
514 raw_write_seqcount_latch(&ls->latch); in latched_seq_write()
516 raw_write_seqcount_latch(&ls->latch); in latched_seq_write()
528 seq = raw_read_seqcount_latch(&ls->latch); in latched_seq_read_nolock()
531 } while (raw_read_seqcount_latch_retry(&ls->latch, seq)); in latched_seq_read_nolock()
/Linux-v6.6/Documentation/devicetree/bindings/pinctrl/
Dmarvell,armada-37xx-pinctrl.txt6 Inside this set of register the gpio latch allows exposing some
/Linux-v6.6/drivers/staging/fbtft/
Dfbtft.h213 struct gpio_desc *latch; member
/Linux-v6.6/arch/arm64/boot/dts/mediatek/
Dmt6795-sony-xperia-m5.dts139 mediatek,latch-ck = <0x14>; /* hs400 */

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