Searched refs:ixDIDT_TD_EDC_CTRL (Results 1 – 8 of 8) sorted by relevance
| /Linux-v6.6/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| D | vega10_powertune.c | 543 …{ ixDIDT_TD_EDC_CTRL, DIDT_TD_EDC_CTRL__EDC_EN_MASK, DIDT_T…
544 …{ ixDIDT_TD_EDC_CTRL, DIDT_TD_EDC_CTRL__EDC_SW_RST_MASK, DIDT_T…
545 …{ ixDIDT_TD_EDC_CTRL, DIDT_TD_EDC_CTRL__EDC_CLK_EN_OVERRIDE_MASK, DIDT_T…
546 …{ ixDIDT_TD_EDC_CTRL, DIDT_TD_EDC_CTRL__EDC_FORCE_STALL_MASK, DIDT_T…
547 …{ ixDIDT_TD_EDC_CTRL, DIDT_TD_EDC_CTRL__EDC_TRIGGER_THROTTLE_LOWBIT_MASK, DIDT_T…
548 …{ ixDIDT_TD_EDC_CTRL, DIDT_TD_EDC_CTRL__EDC_STALL_PATTERN_BIT_NUMS_MASK, DIDT_T…
549 …{ ixDIDT_TD_EDC_CTRL, DIDT_TD_EDC_CTRL__EDC_ALLOW_WRITE_PWRDELTA_MASK, DIDT_T…
550 …{ ixDIDT_TD_EDC_CTRL, DIDT_TD_EDC_CTRL__GC_EDC_EN_MASK, DIDT_T…
551 …{ ixDIDT_TD_EDC_CTRL, DIDT_TD_EDC_CTRL__GC_EDC_STALL_POLICY_MASK, DIDT_T…
552 …{ ixDIDT_TD_EDC_CTRL, DIDT_TD_EDC_CTRL__GC_EDC_LEVEL_COMB_EN_MASK, DIDT_T…
[all …]
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| D | smu7_hwmgr.c | 123 #define ixDIDT_TD_EDC_CTRL 0x0053 macro
156 ixDIDT_TD_EDC_CTRL,
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| /Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_9_0_offset.h | 7207 #define ixDIDT_TD_EDC_CTRL … macro
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| D | gc_9_1_offset.h | 7414 #define ixDIDT_TD_EDC_CTRL … macro
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| D | gc_9_2_1_offset.h | 7455 #define ixDIDT_TD_EDC_CTRL … macro
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| D | gc_9_4_2_offset.h | 104 #define ixDIDT_TD_EDC_CTRL … macro
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| D | gc_10_1_0_offset.h | 11308 #define ixDIDT_TD_EDC_CTRL … macro
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| D | gc_10_3_0_offset.h | 13554 #define ixDIDT_TD_EDC_CTRL … macro
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