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Searched refs:hantro_reg_write (Results 1 – 7 of 7) sorted by relevance

/Linux-v6.6/drivers/media/platform/verisilicon/
Drockchip_vpu981_hw_av1_dec.c619 hantro_reg_write(vpu, &av1_multicore_expect_context_update, !!(context_update_x == 0)); in rockchip_vpu981_av1_dec_set_tile_info()
620 hantro_reg_write(vpu, &av1_tile_enable, in rockchip_vpu981_av1_dec_set_tile_info()
622 hantro_reg_write(vpu, &av1_num_tile_cols_8k, tile_info->tile_cols); in rockchip_vpu981_av1_dec_set_tile_info()
623 hantro_reg_write(vpu, &av1_num_tile_rows_8k, tile_info->tile_rows); in rockchip_vpu981_av1_dec_set_tile_info()
624 hantro_reg_write(vpu, &av1_context_update_tile_id, context_update_tile_id); in rockchip_vpu981_av1_dec_set_tile_info()
625 hantro_reg_write(vpu, &av1_tile_transpose, 1); in rockchip_vpu981_av1_dec_set_tile_info()
628 hantro_reg_write(vpu, &av1_dec_tile_size_mag, tile_info->tile_size_bytes - 1); in rockchip_vpu981_av1_dec_set_tile_info()
630 hantro_reg_write(vpu, &av1_dec_tile_size_mag, 3); in rockchip_vpu981_av1_dec_set_tile_info()
700 hantro_reg_write(vpu, &av1_ref0_height, height); in rockchip_vpu981_av1_dec_set_ref()
701 hantro_reg_write(vpu, &av1_ref0_width, width); in rockchip_vpu981_av1_dec_set_ref()
[all …]
Dhantro_g2_hevc_dec.c42 hantro_reg_write(vpu, &g2_tile_e, tiles_enabled); in prepare_tile_info_buffer()
60 hantro_reg_write(vpu, &g2_num_tile_rows, num_tile_rows); in prepare_tile_info_buffer()
61 hantro_reg_write(vpu, &g2_num_tile_cols, num_tile_cols); in prepare_tile_info_buffer()
108 hantro_reg_write(vpu, &g2_num_tile_rows, 1); in prepare_tile_info_buffer()
109 hantro_reg_write(vpu, &g2_num_tile_cols, 1); in prepare_tile_info_buffer()
167 hantro_reg_write(vpu, &g2_bit_depth_y_minus8, sps->bit_depth_luma_minus8); in set_params()
168 hantro_reg_write(vpu, &g2_bit_depth_c_minus8, sps->bit_depth_chroma_minus8); in set_params()
170 hantro_reg_write(vpu, &g2_hdr_skip_length, compute_header_skip_length(ctx)); in set_params()
175 hantro_reg_write(vpu, &g2_min_cb_size, min_log2_cb_size); in set_params()
176 hantro_reg_write(vpu, &g2_max_cb_size, max_log2_ctb_size); in set_params()
[all …]
Dhantro_g2_vp9_dec.c152 hantro_reg_write(ctx->dev, &g2_out_dis, 0); in config_output()
154 hantro_reg_write(ctx->dev, &g2_output_format, 0); in config_output()
189 hantro_reg_write(ctx->dev, &ref_reg->width, refw); in config_ref()
190 hantro_reg_write(ctx->dev, &ref_reg->height, refh); in config_ref()
192 hantro_reg_write(ctx->dev, &ref_reg->hor_scale, (refw << 14) / dst->vp9.width); in config_ref()
193 hantro_reg_write(ctx->dev, &ref_reg->ver_scale, (refh << 14) / dst->vp9.height); in config_ref()
244 hantro_reg_write(ctx->dev, &vp9_last_sign_bias, in config_ref_registers()
247 hantro_reg_write(ctx->dev, &vp9_gref_sign_bias, in config_ref_registers()
250 hantro_reg_write(ctx->dev, &vp9_aref_sign_bias, in config_ref_registers()
351 hantro_reg_write(ctx->dev, &g2_tile_e, 1); in config_tiles()
[all …]
Drockchip_vpu2_hw_vp8_dec.c285 hantro_reg_write(vpu, &vp8_dec_lf_level[0], lf->level); in cfg_lf()
291 hantro_reg_write(vpu, &vp8_dec_lf_level[i], lf_level); in cfg_lf()
295 hantro_reg_write(vpu, &vp8_dec_lf_level[i], in cfg_lf()
306 hantro_reg_write(vpu, &vp8_dec_mb_adj[i], in cfg_lf()
308 hantro_reg_write(vpu, &vp8_dec_ref_adj[i], in cfg_lf()
323 hantro_reg_write(vpu, &vp8_dec_quant[0], q->y_ac_qi); in cfg_qp()
329 hantro_reg_write(vpu, &vp8_dec_quant[i], quant); in cfg_qp()
333 hantro_reg_write(vpu, &vp8_dec_quant[i], in cfg_qp()
337 hantro_reg_write(vpu, &vp8_dec_quant_delta[0], q->y_dc_delta); in cfg_qp()
338 hantro_reg_write(vpu, &vp8_dec_quant_delta[1], q->y2_dc_delta); in cfg_qp()
[all …]
Dhantro_g1_vp8_dec.c144 hantro_reg_write(vpu, &vp8_dec_lf_level[0], lf->level); in cfg_lf()
150 hantro_reg_write(vpu, &vp8_dec_lf_level[i], lf_level); in cfg_lf()
154 hantro_reg_write(vpu, &vp8_dec_lf_level[i], in cfg_lf()
165 hantro_reg_write(vpu, &vp8_dec_mb_adj[i], in cfg_lf()
167 hantro_reg_write(vpu, &vp8_dec_ref_adj[i], in cfg_lf()
185 hantro_reg_write(vpu, &vp8_dec_quant[0], q->y_ac_qi); in cfg_qp()
191 hantro_reg_write(vpu, &vp8_dec_quant[i], quant); in cfg_qp()
195 hantro_reg_write(vpu, &vp8_dec_quant[i], in cfg_qp()
199 hantro_reg_write(vpu, &vp8_dec_quant_delta[0], q->y_dc_delta); in cfg_qp()
200 hantro_reg_write(vpu, &vp8_dec_quant_delta[1], q->y2_dc_delta); in cfg_qp()
[all …]
Dhantro_postproc.c19 hantro_reg_write(vpu, \
131 hantro_reg_write(vpu, &g2_down_scale_e, 1); in hantro_postproc_g2_enable()
132 hantro_reg_write(vpu, &g2_down_scale_y, down_scale >> 2); in hantro_postproc_g2_enable()
133 hantro_reg_write(vpu, &g2_down_scale_x, down_scale >> 2); in hantro_postproc_g2_enable()
148 hantro_reg_write(ctx->dev, &g2_rs_out_bit_depth, out_depth); in hantro_postproc_g2_enable()
149 hantro_reg_write(ctx->dev, &g2_pp_pix_shift, pp_shift); in hantro_postproc_g2_enable()
151 hantro_reg_write(vpu, &g2_output_8_bits, out_depth > 8 ? 0 : 1); in hantro_postproc_g2_enable()
152 hantro_reg_write(vpu, &g2_output_format, out_depth > 8 ? 1 : 0); in hantro_postproc_g2_enable()
154 hantro_reg_write(vpu, &g2_out_rs_e, 1); in hantro_postproc_g2_enable()
252 hantro_reg_write(vpu, &g2_out_rs_e, 0); in hantro_postproc_g2_disable()
Dhantro.h440 static __always_inline void hantro_reg_write(struct hantro_dev *vpu, in hantro_reg_write() function