| /Linux-v6.6/drivers/gpu/drm/amd/pm/legacy-dpm/ | 
| D | legacy_dpm.c | 127 	if (rps == adev->pm.dpm.current_ps)  in amdgpu_dpm_print_ps_status() 129 	if (rps == adev->pm.dpm.requested_ps)  in amdgpu_dpm_print_ps_status() 131 	if (rps == adev->pm.dpm.boot_ps)  in amdgpu_dpm_print_ps_status() 143 	for (i = 0; i < adev->pm.dpm.num_ps; i++)  in amdgpu_pm_print_power_states() 144 		amdgpu_dpm_print_power_state(adev, &adev->pm.dpm.ps[i]);  in amdgpu_pm_print_power_states() 172 	adev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps);  in amdgpu_get_platform_caps() 173 	adev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime);  in amdgpu_get_platform_caps() 174 	adev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime);  in amdgpu_get_platform_caps() 242 			adev->pm.dpm.fan.t_hyst = fan_info->fan.ucTHyst;  in amdgpu_parse_extended_power_table() 243 			adev->pm.dpm.fan.t_min = le16_to_cpu(fan_info->fan.usTMin);  in amdgpu_parse_extended_power_table() [all …] 
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| D | si_dpm.c | 1854 	struct si_power_info *pi = adev->pm.dpm.priv;  in si_get_pi() 1927 	u32 p_limit1 = adev->pm.dpm.tdp_limit;  in si_update_dte_from_pl2() 1928 	u32 p_limit2 = adev->pm.dpm.near_tdp_limit;  in si_update_dte_from_pl2() 1956 	struct rv7xx_power_info *pi = adev->pm.dpm.priv;  in rv770_get_pi() 1963 	struct ni_power_info *pi = adev->pm.dpm.priv;  in ni_get_pi() 2217 	if (tdp_adjustment > (u32)adev->pm.dpm.tdp_od_limit)  in si_calculate_adjusted_tdp_limits() 2220 	max_tdp_limit = ((100 + 100) * adev->pm.dpm.tdp_limit) / 100;  in si_calculate_adjusted_tdp_limits() 2223 		*tdp_limit = ((100 + tdp_adjustment) * adev->pm.dpm.tdp_limit) / 100;  in si_calculate_adjusted_tdp_limits() 2224 		*near_tdp_limit = adev->pm.dpm.near_tdp_limit_adjusted + (*tdp_limit - adev->pm.dpm.tdp_limit);  in si_calculate_adjusted_tdp_limits() 2226 		*tdp_limit = ((100 - tdp_adjustment) * adev->pm.dpm.tdp_limit) / 100;  in si_calculate_adjusted_tdp_limits() [all …] 
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| D | kv_dpm.c | 77 		&adev->pm.dpm.dyn_state.vddc_dependency_on_sclk;  in kv_convert_vid2_to_vid7() 99 		&adev->pm.dpm.dyn_state.vddc_dependency_on_sclk;  in kv_convert_vid7_to_vid2() 367 	struct kv_power_info *pi = adev->pm.dpm.priv;  in kv_get_pi() 791 		&adev->pm.dpm.dyn_state.vddc_dependency_on_sclk;  in kv_program_bootup_state() 893 		&adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table;  in kv_populate_uvd_table() 966 		&adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table;  in kv_populate_vce_table() 1027 		&adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table;  in kv_populate_samu_table() 1093 		&adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table;  in kv_populate_acp_table() 1152 		&adev->pm.dpm.dyn_state.vddc_dependency_on_sclk;  in kv_calculate_dfs_bypass_settings() 1219 	adev->pm.dpm.current_ps = &pi->current_rps;  in kv_update_current_ps() [all …] 
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| D | Makefile | 23 AMD_LEGACYDPM_PATH = ../pm/legacy-dpm
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| /Linux-v6.6/drivers/gpu/drm/radeon/ | 
| D | r600_dpm.c | 147 	if (rps == rdev->pm.dpm.current_ps)  in r600_dpm_print_ps_status() 149 	if (rps == rdev->pm.dpm.requested_ps)  in r600_dpm_print_ps_status() 151 	if (rps == rdev->pm.dpm.boot_ps)  in r600_dpm_print_ps_status() 758 	rdev->pm.dpm.thermal.min_temp = low_temp;  in r600_set_thermal_temperature_range() 759 	rdev->pm.dpm.thermal.max_temp = high_temp;  in r600_set_thermal_temperature_range() 858 	rdev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps);  in r600_get_platform_caps() 859 	rdev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime);  in r600_get_platform_caps() 860 	rdev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime);  in r600_get_platform_caps() 895 			rdev->pm.dpm.fan.t_hyst = fan_info->fan.ucTHyst;  in r600_parse_extended_power_table() 896 			rdev->pm.dpm.fan.t_min = le16_to_cpu(fan_info->fan.usTMin);  in r600_parse_extended_power_table() [all …] 
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| D | radeon_pm.c | 79 			rdev->pm.dpm.ac_power = true;  in radeon_pm_acpi_event_handler() 81 			rdev->pm.dpm.ac_power = false;  in radeon_pm_acpi_event_handler() 83 			if (rdev->asic->dpm.enable_bapm)  in radeon_pm_acpi_event_handler() 84 				radeon_dpm_enable_bapm(rdev, rdev->pm.dpm.ac_power);  in radeon_pm_acpi_event_handler() 471 	enum radeon_pm_state_type pm = rdev->pm.dpm.user_state;  in radeon_get_dpm_state() 488 		rdev->pm.dpm.user_state = POWER_STATE_TYPE_BATTERY;  in radeon_set_dpm_state() 490 		rdev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED;  in radeon_set_dpm_state() 492 		rdev->pm.dpm.user_state = POWER_STATE_TYPE_PERFORMANCE;  in radeon_set_dpm_state() 515 	enum radeon_dpm_forced_level level = rdev->pm.dpm.forced_level;  in radeon_get_dpm_forced_performance_level() 552 	if (rdev->asic->dpm.force_performance_level) {  in radeon_set_dpm_forced_performance_level() [all …] 
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| D | btc_dpm.c | 1229 	return btc_find_valid_clock(&rdev->pm.dpm.dyn_state.valid_mclk_values,  in btc_get_valid_mclk() 1236 	return btc_find_valid_clock(&rdev->pm.dpm.dyn_state.valid_sclk_values,  in btc_get_valid_sclk() 1279 		if (((pl->mclk + (pl->sclk - 1)) / pl->sclk) > rdev->pm.dpm.dyn_state.mclk_sclk_ratio)  in btc_adjust_clock_combinations() 1283 						       (rdev->pm.dpm.dyn_state.mclk_sclk_ratio - 1)) /  in btc_adjust_clock_combinations() 1284 						      rdev->pm.dpm.dyn_state.mclk_sclk_ratio);  in btc_adjust_clock_combinations() 1286 		if ((pl->sclk - pl->mclk) > rdev->pm.dpm.dyn_state.sclk_mclk_delta)  in btc_adjust_clock_combinations() 1290 						      rdev->pm.dpm.dyn_state.sclk_mclk_delta);  in btc_adjust_clock_combinations() 1317 		if ((*vddc - *vddci) > rdev->pm.dpm.dyn_state.vddc_vddci_delta) {  in btc_apply_voltage_delta_rules() 1319 						       (*vddc - rdev->pm.dpm.dyn_state.vddc_vddci_delta));  in btc_apply_voltage_delta_rules() 1323 		if ((*vddci - *vddc) > rdev->pm.dpm.dyn_state.vddc_vddci_delta) {  in btc_apply_voltage_delta_rules() [all …] 
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| D | ci_dpm.c | 174 	struct ci_power_info *pi = rdev->pm.dpm.priv;  in ci_get_pi() 259 	if (rdev->pm.dpm.dyn_state.cac_leakage_table.entries == NULL)  in ci_populate_bapm_vddc_vid_sidd() 261 	if (rdev->pm.dpm.dyn_state.cac_leakage_table.count > 8)  in ci_populate_bapm_vddc_vid_sidd() 263 	if (rdev->pm.dpm.dyn_state.cac_leakage_table.count !=  in ci_populate_bapm_vddc_vid_sidd() 264 	    rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count)  in ci_populate_bapm_vddc_vid_sidd() 267 	for (i = 0; i < rdev->pm.dpm.dyn_state.cac_leakage_table.count; i++) {  in ci_populate_bapm_vddc_vid_sidd() 268 		if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_EVV) {  in ci_populate_bapm_vddc_vid_sidd() 269 			lo_vid[i] = ci_convert_to_vid(rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc1);  in ci_populate_bapm_vddc_vid_sidd() 270 			hi_vid[i] = ci_convert_to_vid(rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc2);  in ci_populate_bapm_vddc_vid_sidd() 271 			hi2_vid[i] = ci_convert_to_vid(rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc3);  in ci_populate_bapm_vddc_vid_sidd() [all …] 
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| D | si_dpm.c | 1745 	struct si_power_info *pi = rdev->pm.dpm.priv;  in si_get_pi() 1819 	u32 p_limit1 = rdev->pm.dpm.tdp_limit;  in si_update_dte_from_pl2() 1820 	u32 p_limit2 = rdev->pm.dpm.near_tdp_limit;  in si_update_dte_from_pl2() 2110 	if (tdp_adjustment > (u32)rdev->pm.dpm.tdp_od_limit)  in si_calculate_adjusted_tdp_limits() 2113 	max_tdp_limit = ((100 + 100) * rdev->pm.dpm.tdp_limit) / 100;  in si_calculate_adjusted_tdp_limits() 2116 		*tdp_limit = ((100 + tdp_adjustment) * rdev->pm.dpm.tdp_limit) / 100;  in si_calculate_adjusted_tdp_limits() 2117 		*near_tdp_limit = rdev->pm.dpm.near_tdp_limit_adjusted + (*tdp_limit - rdev->pm.dpm.tdp_limit);  in si_calculate_adjusted_tdp_limits() 2119 		*tdp_limit = ((100 - tdp_adjustment) * rdev->pm.dpm.tdp_limit) / 100;  in si_calculate_adjusted_tdp_limits() 2120 		adjustment_delta  = rdev->pm.dpm.tdp_limit - *tdp_limit;  in si_calculate_adjusted_tdp_limits() 2121 		if (adjustment_delta < rdev->pm.dpm.near_tdp_limit_adjusted)  in si_calculate_adjusted_tdp_limits() [all …] 
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| D | kv_dpm.c | 153 	struct kv_power_info *pi = rdev->pm.dpm.priv;  in kv_get_pi() 399 		&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk;  in kv_convert_vid2_to_vid7() 421 		&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk;  in kv_convert_vid7_to_vid2() 562 		&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk;  in kv_program_bootup_state() 664 		&rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table;  in kv_populate_uvd_table() 737 		&rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table;  in kv_populate_vce_table() 798 		&rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table;  in kv_populate_samu_table() 864 		&rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table;  in kv_populate_acp_table() 923 		&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk;  in kv_calculate_dfs_bypass_settings() 1121 	kv_update_current_ps(rdev, rdev->pm.dpm.boot_ps);  in kv_dpm_enable() [all …] 
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| D | rv6xx_dpm.c | 45 	struct rv6xx_power_info *pi = rdev->pm.dpm.priv;  in rv6xx_get_pi() 921 							  rdev->pm.dpm.voltage_response_time,  in rv6xx_program_voltage_timing_parameters() 925 					   rdev->pm.dpm.backbias_response_time,  in rv6xx_program_voltage_timing_parameters() 1185 	if (rdev->pm.dpm.new_active_crtcs & 1) {  in rv6xx_program_display_gap() 1188 	} else if (rdev->pm.dpm.new_active_crtcs & 2) {  in rv6xx_program_display_gap() 1298 		msleep((rdev->pm.dpm.voltage_response_time + 999) / 1000);  in rv6xx_step_sw_voltage() 1548 	struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps;  in rv6xx_dpm_enable() 1553 	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_BACKBIAS)  in rv6xx_dpm_enable() 1615 	struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps;  in rv6xx_dpm_disable() 1633 	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_BACKBIAS)  in rv6xx_dpm_disable() [all …] 
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| D | rs780_dpm.c | 44 	struct igp_power_info *pi = rdev->pm.dpm.priv;  in rs780_get_pi() 380 	struct igp_ps *current_state = rs780_get_ps(rdev->pm.dpm.current_ps);  in rs780_force_voltage() 407 	struct igp_ps *current_state = rs780_get_ps(rdev->pm.dpm.current_ps);  in rs780_force_fbdiv() 600 	struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps;  in rs780_dpm_enable() 652 	struct radeon_ps *new_ps = rdev->pm.dpm.requested_ps;  in rs780_dpm_set_power_state() 653 	struct radeon_ps *old_ps = rdev->pm.dpm.current_ps;  in rs780_dpm_set_power_state() 742 		rdev->pm.dpm.boot_ps = rps;  in rs780_parse_pplib_non_clock_info() 744 		rdev->pm.dpm.uvd_ps = rps;  in rs780_parse_pplib_non_clock_info() 807 	rdev->pm.dpm.ps = kcalloc(power_info->pplib.ucNumStates,  in rs780_parse_power_table() 810 	if (!rdev->pm.dpm.ps)  in rs780_parse_power_table() [all …] 
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| D | ni_dpm.c | 728 	struct ni_power_info *pi = rdev->pm.dpm.priv;  in ni_get_pi() 795 	if ((rdev->pm.dpm.new_active_crtc_count > 1) ||  in ni_apply_state_adjust_rules() 801 	if (rdev->pm.dpm.ac_power)  in ni_apply_state_adjust_rules() 802 		max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac;  in ni_apply_state_adjust_rules() 804 		max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc;  in ni_apply_state_adjust_rules() 806 	if (rdev->pm.dpm.ac_power == false) {  in ni_apply_state_adjust_rules() 873 		btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,  in ni_apply_state_adjust_rules() 876 		btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,  in ni_apply_state_adjust_rules() 879 		btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,  in ni_apply_state_adjust_rules() 882 		btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk,  in ni_apply_state_adjust_rules() [all …] 
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| D | trinity_dpm.c | 313 	struct trinity_power_info *pi = rdev->pm.dpm.priv;  in trinity_get_pi() 1017 	rdev->pm.dpm.thermal.min_temp = low_temp;  in trinity_set_thermal_temperature_range() 1018 	rdev->pm.dpm.thermal.max_temp = high_temp;  in trinity_set_thermal_temperature_range() 1080 	trinity_update_current_ps(rdev, rdev->pm.dpm.boot_ps);  in trinity_dpm_enable() 1128 	trinity_update_current_ps(rdev, rdev->pm.dpm.boot_ps);  in trinity_dpm_disable() 1183 	rdev->pm.dpm.forced_level = level;  in trinity_dpm_force_performance_level() 1191 	struct radeon_ps requested_ps = *rdev->pm.dpm.requested_ps;  in trinity_dpm_pre_set_power_state() 1212 			trinity_dpm_bapm_enable(rdev, rdev->pm.dpm.ac_power);  in trinity_dpm_set_power_state() 1466 		&rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table;  in trinity_get_vce_clock_voltage() 1503 	u32 num_active_displays = rdev->pm.dpm.new_active_crtc_count;  in trinity_apply_state_adjust_rules() [all …] 
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| D | rv770_dpm.c | 58 	struct rv7xx_power_info *pi = rdev->pm.dpm.priv;  in rv770_get_pi() 65 	struct evergreen_power_info *pi = rdev->pm.dpm.priv;  in evergreen_get_pi() 1192 	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_HARDWAREDC) {  in rv770_init_smc_table() 1195 		if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_DONT_WAIT_FOR_VBLANK_ON_ALERT)  in rv770_init_smc_table() 1198 		if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_GOTO_BOOT_ON_ALERT)  in rv770_init_smc_table() 1202 	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_STEPVDDC)  in rv770_init_smc_table() 1348 	if (rdev->pm.dpm.new_active_crtcs & 1) {  in rv770_program_display_gap() 1351 	} else if (rdev->pm.dpm.new_active_crtcs & 2) {  in rv770_program_display_gap() 1500 	rdev->pm.dpm.forced_level = level;  in rv770_dpm_force_performance_level() 1709 	voltage_response_time = (u32)rdev->pm.dpm.voltage_response_time;  in rv770_program_response_times() [all …] 
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| D | cypress_dpm.c | 1638 	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_HARDWAREDC)  in cypress_init_smc_table() 1641 	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_REGULATOR_HOT)  in cypress_init_smc_table() 1644 	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_STEPVDDC)  in cypress_init_smc_table() 1751 	if (rdev->pm.dpm.new_active_crtc_count > 0)  in cypress_program_display_gap() 1756 	if (rdev->pm.dpm.new_active_crtc_count > 1)  in cypress_program_display_gap() 1766 	if ((rdev->pm.dpm.new_active_crtc_count > 0) &&  in cypress_program_display_gap() 1767 	    (!(rdev->pm.dpm.new_active_crtcs & (1 << pipe)))) {  in cypress_program_display_gap() 1770 			if (rdev->pm.dpm.new_active_crtcs & (1 << i))  in cypress_program_display_gap() 1783 	cypress_notify_smc_display_change(rdev, rdev->pm.dpm.new_active_crtc_count > 0);  in cypress_program_display_gap() 1810 	struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps;  in cypress_dpm_enable() [all …] 
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| D | sumo_dpm.c | 83 	struct sumo_power_info *pi = rdev->pm.dpm.priv;  in sumo_get_pi() 1174 	rdev->pm.dpm.thermal.min_temp = low_temp;  in sumo_set_thermal_temperature_range() 1175 	rdev->pm.dpm.thermal.max_temp = high_temp;  in sumo_set_thermal_temperature_range() 1232 	sumo_update_current_ps(rdev, rdev->pm.dpm.boot_ps);  in sumo_dpm_enable() 1277 	sumo_update_current_ps(rdev, rdev->pm.dpm.boot_ps);  in sumo_dpm_disable() 1283 	struct radeon_ps requested_ps = *rdev->pm.dpm.requested_ps;  in sumo_dpm_pre_set_power_state() 1422 		rdev->pm.dpm.boot_ps = rps;  in sumo_parse_pplib_non_clock_info() 1426 		rdev->pm.dpm.uvd_ps = rps;  in sumo_parse_pplib_non_clock_info() 1484 	rdev->pm.dpm.ps = kcalloc(state_array->ucNumEntries,  in sumo_parse_power_table() 1487 	if (!rdev->pm.dpm.ps)  in sumo_parse_power_table() [all …] 
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| D | radeon.h | 1648 	struct radeon_dpm       dpm;  member 1986 	} dpm;  member 2766 #define radeon_dpm_init(rdev) rdev->asic->dpm.init((rdev)) 2767 #define radeon_dpm_setup_asic(rdev) rdev->asic->dpm.setup_asic((rdev)) 2768 #define radeon_dpm_enable(rdev) rdev->asic->dpm.enable((rdev)) 2769 #define radeon_dpm_late_enable(rdev) rdev->asic->dpm.late_enable((rdev)) 2770 #define radeon_dpm_disable(rdev) rdev->asic->dpm.disable((rdev)) 2771 #define radeon_dpm_pre_set_power_state(rdev) rdev->asic->dpm.pre_set_power_state((rdev)) 2772 #define radeon_dpm_set_power_state(rdev) rdev->asic->dpm.set_power_state((rdev)) 2773 #define radeon_dpm_post_set_power_state(rdev) rdev->asic->dpm.post_set_power_state((rdev)) [all …] 
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| D | radeon_uvd.c | 867 			radeon_uvd_count_handles(rdev, &rdev->pm.dpm.sd,  in radeon_uvd_idle_work_handler() 868 						 &rdev->pm.dpm.hd);  in radeon_uvd_idle_work_handler() 889 		if ((rdev->pm.dpm.sd != sd) ||  in radeon_uvd_note_usage() 890 		    (rdev->pm.dpm.hd != hd)) {  in radeon_uvd_note_usage() 891 			rdev->pm.dpm.sd = sd;  in radeon_uvd_note_usage() 892 			rdev->pm.dpm.hd = hd;  in radeon_uvd_note_usage()
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| D | radeon_asic.c | 1084 	.dpm = { 1177 	.dpm = { 1283 	.dpm = { 1403 	.dpm = { 1497 	.dpm = { 1591 	.dpm = { 1739 	.dpm = { 1860 	.dpm = { 1998 	.dpm = { 2168 	.dpm = { [all …] 
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| /Linux-v6.6/drivers/gpu/drm/amd/pm/ | 
| D | amdgpu_dpm_internal.c | 36 	adev->pm.dpm.new_active_crtcs = 0;  in amdgpu_dpm_get_active_displays() 37 	adev->pm.dpm.new_active_crtc_count = 0;  in amdgpu_dpm_get_active_displays() 43 				adev->pm.dpm.new_active_crtcs |= (1 << amdgpu_crtc->crtc_id);  in amdgpu_dpm_get_active_displays() 44 				adev->pm.dpm.new_active_crtc_count++;  in amdgpu_dpm_get_active_displays()
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| D | Makefile | 36 		-I$(FULL_AMD_PATH)/pm/legacy-dpm 40 PM_LIBS = swsmu powerplay legacy-dpm
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| D | amdgpu_dpm.c | 521 			adev->pm.dpm.uvd_active = true;  in amdgpu_dpm_enable_uvd() 522 			adev->pm.dpm.state = POWER_STATE_TYPE_INTERNAL_UVD;  in amdgpu_dpm_enable_uvd() 524 			adev->pm.dpm.uvd_active = false;  in amdgpu_dpm_enable_uvd() 545 			adev->pm.dpm.vce_active = true;  in amdgpu_dpm_enable_vce() 547 			adev->pm.dpm.vce_level = AMD_VCE_LEVEL_AC_ALL;  in amdgpu_dpm_enable_vce() 549 			adev->pm.dpm.vce_active = false;  in amdgpu_dpm_enable_vce() 846 		*state = adev->pm.dpm.user_state;  in amdgpu_dpm_get_current_power_state() 853 		*state = adev->pm.dpm.user_state;  in amdgpu_dpm_get_current_power_state() 863 	adev->pm.dpm.user_state = state;  in amdgpu_dpm_set_power_state() 887 		level = adev->pm.dpm.forced_level;  in amdgpu_dpm_get_performance_level() [all …] 
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| /Linux-v6.6/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ | 
| D | hardwaremanager.c | 260 	adev->pm.dpm.thermal.min_temp = range.min;  in phm_start_thermal_controller() 261 	adev->pm.dpm.thermal.max_temp = range.max;  in phm_start_thermal_controller() 262 	adev->pm.dpm.thermal.max_edge_emergency_temp = range.edge_emergency_max;  in phm_start_thermal_controller() 263 	adev->pm.dpm.thermal.min_hotspot_temp = range.hotspot_min;  in phm_start_thermal_controller() 264 	adev->pm.dpm.thermal.max_hotspot_crit_temp = range.hotspot_crit_max;  in phm_start_thermal_controller() 265 	adev->pm.dpm.thermal.max_hotspot_emergency_temp = range.hotspot_emergency_max;  in phm_start_thermal_controller() 266 	adev->pm.dpm.thermal.min_mem_temp = range.mem_min;  in phm_start_thermal_controller() 267 	adev->pm.dpm.thermal.max_mem_crit_temp = range.mem_crit_max;  in phm_start_thermal_controller() 268 	adev->pm.dpm.thermal.max_mem_emergency_temp = range.mem_emergency_max;  in phm_start_thermal_controller() 269 	adev->pm.dpm.thermal.sw_ctf_threshold = range.sw_ctf_threshold;  in phm_start_thermal_controller()
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| /Linux-v6.6/drivers/net/can/ | 
| D | janz-ican3.c | 229 	void __iomem *dpm;  member 316 	peer = ioread8(mod->dpm + MSYNC_PEER);  in ican3_old_recv_msg() 317 	locl = ioread8(mod->dpm + MSYNC_LOCL);  in ican3_old_recv_msg() 334 	memcpy_fromio(msg, mod->dpm, sizeof(*msg));  in ican3_old_recv_msg() 343 	iowrite8(locl, mod->dpm + MSYNC_LOCL);  in ican3_old_recv_msg() 361 	peer = ioread8(mod->dpm + MSYNC_PEER);  in ican3_old_send_msg() 362 	locl = ioread8(mod->dpm + MSYNC_LOCL);  in ican3_old_send_msg() 376 	memcpy_toio(mod->dpm, msg, sizeof(*msg));  in ican3_old_send_msg() 383 	iowrite8(locl, mod->dpm + MSYNC_LOCL);  in ican3_old_send_msg() 406 	dst = mod->dpm;  in ican3_init_new_host_interface() [all …] 
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