| /Linux-v6.6/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| D | hardwaremanager.c | 305 const struct amd_pp_display_configuration *display_config) in phm_store_dal_configuration_data() argument
312 if (display_config == NULL) in phm_store_dal_configuration_data()
316 hwmgr->hwmgr_func->set_min_deep_sleep_dcefclk(hwmgr, display_config->min_dcef_deep_sleep_set_clk); in phm_store_dal_configuration_data()
318 for (index = 0; index < display_config->num_path_including_non_display; index++) { in phm_store_dal_configuration_data()
319 if (display_config->displays[index].controller_id != 0) in phm_store_dal_configuration_data()
333 display_config->cpu_pstate_separation_time, in phm_store_dal_configuration_data()
334 display_config->cpu_cc6_disable, in phm_store_dal_configuration_data()
335 display_config->cpu_pstate_disable, in phm_store_dal_configuration_data()
336 display_config->nb_pstate_switch_disable); in phm_store_dal_configuration_data()
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| D | vega12_hwmgr.c | 1613 if ((hwmgr->display_config->num_display > 1) && in vega12_notify_smc_display_config_after_ps_adjustment()
1614 !hwmgr->display_config->multi_monitor_in_sync && in vega12_notify_smc_display_config_after_ps_adjustment()
1615 !hwmgr->display_config->nb_pstate_switch_disable) in vega12_notify_smc_display_config_after_ps_adjustment()
1620 min_clocks.dcefClock = hwmgr->display_config->min_dcef_set_clk; in vega12_notify_smc_display_config_after_ps_adjustment()
1621 min_clocks.dcefClockInSR = hwmgr->display_config->min_dcef_deep_sleep_set_clk; in vega12_notify_smc_display_config_after_ps_adjustment()
1622 min_clocks.memoryClock = hwmgr->display_config->min_mem_set_clock; in vega12_notify_smc_display_config_after_ps_adjustment()
2356 disable_mclk_switching = ((1 < hwmgr->display_config->num_display) && in vega12_apply_clocks_adjust_rules()
2357 !hwmgr->display_config->multi_monitor_in_sync) || in vega12_apply_clocks_adjust_rules()
2359 latency = hwmgr->display_config->dce_tolerable_mclk_in_active_latency; in vega12_apply_clocks_adjust_rules()
2410 if (dpm_table->dpm_state.hard_min_level < (hwmgr->display_config->min_mem_set_clock / 100)) in vega12_apply_clocks_adjust_rules()
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| D | vega20_hwmgr.c | 2347 min_clocks.dcefClock = hwmgr->display_config->min_dcef_set_clk; in vega20_notify_smc_display_config_after_ps_adjustment()
2348 min_clocks.dcefClockInSR = hwmgr->display_config->min_dcef_deep_sleep_set_clk; in vega20_notify_smc_display_config_after_ps_adjustment()
2349 min_clocks.memoryClock = hwmgr->display_config->min_mem_set_clock; in vega20_notify_smc_display_config_after_ps_adjustment()
3662 hwmgr->display_config->num_display, in vega20_display_configuration_changed_task()
3737 disable_mclk_switching = ((1 < hwmgr->display_config->num_display) && in vega20_apply_clocks_adjust_rules()
3738 !hwmgr->display_config->multi_monitor_in_sync) || in vega20_apply_clocks_adjust_rules()
3740 latency = hwmgr->display_config->dce_tolerable_mclk_in_active_latency; in vega20_apply_clocks_adjust_rules()
3791 if (dpm_table->dpm_state.hard_min_level < (hwmgr->display_config->min_mem_set_clock / 100)) in vega20_apply_clocks_adjust_rules()
3792 dpm_table->dpm_state.hard_min_level = hwmgr->display_config->min_mem_set_clock / 100; in vega20_apply_clocks_adjust_rules()
3799 if (dpm_table->dpm_levels[i].value >= (hwmgr->display_config->min_mem_set_clock / 100)) { in vega20_apply_clocks_adjust_rules()
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| D | smu10_hwmgr.c | 194 clocks.dcefClock = hwmgr->display_config->min_dcef_set_clk; in smu10_set_clock_limit()
628 uint32_t min_sclk = hwmgr->display_config->min_core_set_clock; in smu10_dpm_force_dpm_level()
629 uint32_t min_mclk = hwmgr->display_config->min_mem_set_clock/100; in smu10_dpm_force_dpm_level()
785 hwmgr->display_config->num_display > 3 ? in smu10_dpm_force_dpm_level()
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| D | smu7_hwmgr.c | 3353 minimum_clocks.engineClock = hwmgr->display_config->min_core_set_clock; in smu7_apply_state_adjust_rules()
3354 minimum_clocks.memoryClock = hwmgr->display_config->min_mem_set_clock; in smu7_apply_state_adjust_rules()
3384 disable_mclk_switching_for_display = ((1 < hwmgr->display_config->num_display) && in smu7_apply_state_adjust_rules()
3385 !hwmgr->display_config->multi_monitor_in_sync) || in smu7_apply_state_adjust_rules()
3386 (hwmgr->display_config->num_display && in smu7_apply_state_adjust_rules()
3387 smu7_vblank_too_short(hwmgr, hwmgr->display_config->min_vblank_time)); in smu7_apply_state_adjust_rules()
3392 if (hwmgr->display_config->num_display == 0) { in smu7_apply_state_adjust_rules()
3434 latency = hwmgr->display_config->dce_tolerable_mclk_in_active_latency; in smu7_apply_state_adjust_rules()
4108 if (data->display_timing.num_existing_displays != hwmgr->display_config->num_display) in smu7_find_dpm_states_clocks_in_dpm_table()
4565 …display_gap = PHM_SET_FIELD(display_gap, CG_DISPLAY_GAP_CNTL, DISP_GAP, (hwmgr->display_config->nu… in smu7_program_display_gap()
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| D | vega10_hwmgr.c | 3306 minimum_clocks.engineClock = hwmgr->display_config->min_core_set_clock; in vega10_apply_state_adjust_rules()
3307 minimum_clocks.memoryClock = hwmgr->display_config->min_mem_set_clock; in vega10_apply_state_adjust_rules()
3347 if (hwmgr->display_config->num_display == 0) in vega10_apply_state_adjust_rules()
3350 disable_mclk_switching = ((1 < hwmgr->display_config->num_display) && in vega10_apply_state_adjust_rules()
3351 !hwmgr->display_config->multi_monitor_in_sync) || in vega10_apply_state_adjust_rules()
3383 latency = hwmgr->display_config->dce_tolerable_mclk_in_active_latency; in vega10_apply_state_adjust_rules()
3449 if (data->display_timing.num_existing_displays != hwmgr->display_config->num_display) in vega10_find_dpm_states_clocks_in_dpm_table()
4073 if ((hwmgr->display_config->num_display > 1) && in vega10_notify_smc_display_config_after_ps_adjustment()
4074 !hwmgr->display_config->multi_monitor_in_sync && in vega10_notify_smc_display_config_after_ps_adjustment()
4075 !hwmgr->display_config->nb_pstate_switch_disable) in vega10_notify_smc_display_config_after_ps_adjustment()
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| D | smu8_hwmgr.c | 702 clock = hwmgr->display_config->min_core_set_clock; in smu8_update_sclk_limit()
760 uint32_t clks = hwmgr->display_config->min_core_set_clock_in_sr; in smu8_set_deep_sleep_sclk_threshold()
1082 clocks.memoryClock = hwmgr->display_config->min_mem_set_clock != 0 ? in smu8_apply_state_adjust_rules()
1083 hwmgr->display_config->min_mem_set_clock : in smu8_apply_state_adjust_rules()
1091 || (hwmgr->display_config->num_display >= 3); in smu8_apply_state_adjust_rules()
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| /Linux-v6.6/arch/arm/mach-davinci/ |
| D | da8xx.h | 76 (struct vpif_display_config *display_config);
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| D | da850.c | 333 *display_config) in da850_register_vpif_display()
335 da850_vpif_display_dev.dev.platform_data = display_config; in da850_register_vpif_display()
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| /Linux-v6.6/drivers/gpu/drm/amd/pm/powerplay/inc/ |
| D | hardwaremanager.h | 428 const struct amd_pp_display_configuration *display_config);
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| D | hwmgr.h | 794 const struct amd_pp_display_configuration *display_config; member
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| /Linux-v6.6/drivers/gpu/drm/amd/pm/powerplay/ |
| D | amd_powerplay.c | 58 hwmgr->display_config = &adev->pm.pm_display_cfg; in amd_powerplay_create()
1034 const struct amd_pp_display_configuration *display_config) in pp_display_configuration_change() argument
1041 phm_store_dal_configuration_data(hwmgr, display_config); in pp_display_configuration_change()
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| /Linux-v6.6/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
| D | vegam_smumgr.c | 839 data->display_timing.min_clock_in_sr = hwmgr->display_config->min_core_set_clock_in_sr; in vegam_populate_single_graphic_level()
843 hwmgr->display_config->min_core_set_clock_in_sr); in vegam_populate_single_graphic_level()
1013 data->display_timing.num_existing_displays = hwmgr->display_config->num_display; in vegam_populate_single_memory_level()
1014 data->display_timing.vrefresh = hwmgr->display_config->vrefresh; in vegam_populate_single_memory_level()
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| D | fiji_smumgr.c | 974 data->display_timing.min_clock_in_sr = hwmgr->display_config->min_core_set_clock_in_sr; in fiji_populate_single_graphic_level()
978 hwmgr->display_config->min_core_set_clock_in_sr); in fiji_populate_single_graphic_level()
1199 data->display_timing.num_existing_displays = hwmgr->display_config->num_display; in fiji_populate_single_memory_level()
1200 data->display_timing.vrefresh = hwmgr->display_config->vrefresh; in fiji_populate_single_memory_level()
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| D | polaris10_smumgr.c | 993 data->display_timing.min_clock_in_sr = hwmgr->display_config->min_core_set_clock_in_sr; in polaris10_populate_single_graphic_level()
997 hwmgr->display_config->min_core_set_clock_in_sr); in polaris10_populate_single_graphic_level()
1188 data->display_timing.num_existing_displays = hwmgr->display_config->num_display; in polaris10_populate_single_memory_level()
1189 data->display_timing.vrefresh = hwmgr->display_config->vrefresh; in polaris10_populate_single_memory_level()
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| D | iceland_smumgr.c | 932 hwmgr->display_config->min_core_set_clock_in_sr; in iceland_populate_single_graphic_level()
1282 data->display_timing.num_existing_displays = hwmgr->display_config->num_display; in iceland_populate_single_memory_level()
1283 data->display_timing.vrefresh = hwmgr->display_config->vrefresh; in iceland_populate_single_memory_level()
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| D | tonga_smumgr.c | 659 hwmgr->display_config->min_core_set_clock_in_sr; in tonga_populate_single_graphic_level()
1016 data->display_timing.num_existing_displays = hwmgr->display_config->num_display; in tonga_populate_single_memory_level()
1017 data->display_timing.vrefresh = hwmgr->display_config->vrefresh; in tonga_populate_single_memory_level()
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| D | ci_smumgr.c | 1236 data->display_timing.num_existing_displays = hwmgr->display_config->num_display; in ci_populate_single_memory_level()
1237 data->display_timing.vrefresh = hwmgr->display_config->vrefresh; in ci_populate_single_memory_level()
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| /Linux-v6.6/drivers/gpu/drm/amd/pm/swsmu/ |
| D | amdgpu_smu.c | 1147 smu->display_config = &adev->pm.pm_display_cfg; in smu_sw_init()
1772 const struct amd_pp_display_configuration *display_config) in smu_display_configuration_change() argument
1779 if (!display_config) in smu_display_configuration_change()
1783 display_config->min_dcef_deep_sleep_set_clk / 100); in smu_display_configuration_change()
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| /Linux-v6.6/drivers/gpu/drm/amd/pm/swsmu/inc/ |
| D | amdgpu_smu.h | 488 struct amd_pp_display_configuration *display_config; member
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| /Linux-v6.6/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
| D | navi10_ppt.c | 1855 smu->display_config->num_display, in navi10_display_config_changed()
2084 min_clocks.dcef_clock = smu->display_config->min_dcef_set_clk; in navi10_notify_smc_display_config()
2085 min_clocks.dcef_clock_in_sr = smu->display_config->min_dcef_deep_sleep_set_clk; in navi10_notify_smc_display_config()
2086 min_clocks.memory_clock = smu->display_config->min_mem_set_clock; in navi10_notify_smc_display_config()
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| D | sienna_cichlid_ppt.c | 1555 smu->display_config->num_display, in sienna_cichlid_display_config_changed()
1784 min_clocks.dcef_clock = smu->display_config->min_dcef_set_clk; in sienna_cichlid_notify_smc_display_config()
1785 min_clocks.dcef_clock_in_sr = smu->display_config->min_dcef_deep_sleep_set_clk; in sienna_cichlid_notify_smc_display_config()
1786 min_clocks.memory_clock = smu->display_config->min_mem_set_clock; in sienna_cichlid_notify_smc_display_config()
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