1 /*
2 * Copyright (C) 2013, NVIDIA Corporation. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 */
23
24 #include <linux/debugfs.h>
25 #include <linux/delay.h>
26 #include <linux/gpio/consumer.h>
27 #include <linux/iopoll.h>
28 #include <linux/module.h>
29 #include <linux/of_platform.h>
30 #include <linux/platform_device.h>
31 #include <linux/pm_runtime.h>
32 #include <linux/regulator/consumer.h>
33
34 #include <video/display_timing.h>
35 #include <video/of_display_timing.h>
36 #include <video/videomode.h>
37
38 #include <drm/display/drm_dp_aux_bus.h>
39 #include <drm/display/drm_dp_helper.h>
40 #include <drm/drm_crtc.h>
41 #include <drm/drm_device.h>
42 #include <drm/drm_edid.h>
43 #include <drm/drm_panel.h>
44
45 /**
46 * struct panel_delay - Describes delays for a simple panel.
47 */
48 struct panel_delay {
49 /**
50 * @hpd_reliable: Time for HPD to be reliable
51 *
52 * The time (in milliseconds) that it takes after powering the panel
53 * before the HPD signal is reliable. Ideally this is 0 but some panels,
54 * board designs, or bad pulldown configs can cause a glitch here.
55 *
56 * NOTE: on some old panel data this number appears to be much too big.
57 * Presumably some old panels simply didn't have HPD hooked up and put
58 * the hpd_absent here because this field predates the
59 * hpd_absent. While that works, it's non-ideal.
60 */
61 unsigned int hpd_reliable;
62
63 /**
64 * @hpd_absent: Time to wait if HPD isn't hooked up.
65 *
66 * Add this to the prepare delay if we know Hot Plug Detect isn't used.
67 *
68 * This is T3-max on eDP timing diagrams or the delay from power on
69 * until HPD is guaranteed to be asserted.
70 */
71 unsigned int hpd_absent;
72
73 /**
74 * @prepare_to_enable: Time between prepare and enable.
75 *
76 * The minimum time, in milliseconds, that needs to have passed
77 * between when prepare finished and enable may begin. If at
78 * enable time less time has passed since prepare finished,
79 * the driver waits for the remaining time.
80 *
81 * If a fixed enable delay is also specified, we'll start
82 * counting before delaying for the fixed delay.
83 *
84 * If a fixed prepare delay is also specified, we won't start
85 * counting until after the fixed delay. We can't overlap this
86 * fixed delay with the min time because the fixed delay
87 * doesn't happen at the end of the function if a HPD GPIO was
88 * specified.
89 *
90 * In other words:
91 * prepare()
92 * ...
93 * // do fixed prepare delay
94 * // wait for HPD GPIO if applicable
95 * // start counting for prepare_to_enable
96 *
97 * enable()
98 * // do fixed enable delay
99 * // enforce prepare_to_enable min time
100 *
101 * This is not specified in a standard way on eDP timing diagrams.
102 * It is effectively the time from HPD going high till you can
103 * turn on the backlight.
104 */
105 unsigned int prepare_to_enable;
106
107 /**
108 * @enable: Time for the panel to display a valid frame.
109 *
110 * The time (in milliseconds) that it takes for the panel to
111 * display the first valid frame after starting to receive
112 * video data.
113 *
114 * This is (T6-min + max(T7-max, T8-min)) on eDP timing diagrams or
115 * the delay after link training finishes until we can turn the
116 * backlight on and see valid data.
117 */
118 unsigned int enable;
119
120 /**
121 * @disable: Time for the panel to turn the display off.
122 *
123 * The time (in milliseconds) that it takes for the panel to
124 * turn the display off (no content is visible).
125 *
126 * This is T9-min (delay from backlight off to end of valid video
127 * data) on eDP timing diagrams. It is not common to set.
128 */
129 unsigned int disable;
130
131 /**
132 * @unprepare: Time to power down completely.
133 *
134 * The time (in milliseconds) that it takes for the panel
135 * to power itself down completely.
136 *
137 * This time is used to prevent a future "prepare" from
138 * starting until at least this many milliseconds has passed.
139 * If at prepare time less time has passed since unprepare
140 * finished, the driver waits for the remaining time.
141 *
142 * This is T12-min on eDP timing diagrams.
143 */
144 unsigned int unprepare;
145 };
146
147 /**
148 * struct panel_desc - Describes a simple panel.
149 */
150 struct panel_desc {
151 /**
152 * @modes: Pointer to array of fixed modes appropriate for this panel.
153 *
154 * If only one mode then this can just be the address of the mode.
155 * NOTE: cannot be used with "timings" and also if this is specified
156 * then you cannot override the mode in the device tree.
157 */
158 const struct drm_display_mode *modes;
159
160 /** @num_modes: Number of elements in modes array. */
161 unsigned int num_modes;
162
163 /**
164 * @timings: Pointer to array of display timings
165 *
166 * NOTE: cannot be used with "modes" and also these will be used to
167 * validate a device tree override if one is present.
168 */
169 const struct display_timing *timings;
170
171 /** @num_timings: Number of elements in timings array. */
172 unsigned int num_timings;
173
174 /** @bpc: Bits per color. */
175 unsigned int bpc;
176
177 /** @size: Structure containing the physical size of this panel. */
178 struct {
179 /**
180 * @size.width: Width (in mm) of the active display area.
181 */
182 unsigned int width;
183
184 /**
185 * @size.height: Height (in mm) of the active display area.
186 */
187 unsigned int height;
188 } size;
189
190 /** @delay: Structure containing various delay values for this panel. */
191 struct panel_delay delay;
192 };
193
194 /**
195 * struct edp_panel_entry - Maps panel ID to delay / panel name.
196 */
197 struct edp_panel_entry {
198 /** @panel_id: 32-bit ID for panel, encoded with drm_edid_encode_panel_id(). */
199 u32 panel_id;
200
201 /** @delay: The power sequencing delays needed for this panel. */
202 const struct panel_delay *delay;
203
204 /** @name: Name of this panel (for printing to logs). */
205 const char *name;
206 };
207
208 struct panel_edp {
209 struct drm_panel base;
210 bool enabled;
211 bool no_hpd;
212
213 bool prepared;
214
215 ktime_t prepared_time;
216 ktime_t unprepared_time;
217
218 const struct panel_desc *desc;
219
220 struct regulator *supply;
221 struct i2c_adapter *ddc;
222 struct drm_dp_aux *aux;
223
224 struct gpio_desc *enable_gpio;
225 struct gpio_desc *hpd_gpio;
226
227 const struct edp_panel_entry *detected_panel;
228
229 struct edid *edid;
230
231 struct drm_display_mode override_mode;
232
233 enum drm_panel_orientation orientation;
234 };
235
to_panel_edp(struct drm_panel * panel)236 static inline struct panel_edp *to_panel_edp(struct drm_panel *panel)
237 {
238 return container_of(panel, struct panel_edp, base);
239 }
240
panel_edp_get_timings_modes(struct panel_edp * panel,struct drm_connector * connector)241 static unsigned int panel_edp_get_timings_modes(struct panel_edp *panel,
242 struct drm_connector *connector)
243 {
244 struct drm_display_mode *mode;
245 unsigned int i, num = 0;
246
247 for (i = 0; i < panel->desc->num_timings; i++) {
248 const struct display_timing *dt = &panel->desc->timings[i];
249 struct videomode vm;
250
251 videomode_from_timing(dt, &vm);
252 mode = drm_mode_create(connector->dev);
253 if (!mode) {
254 dev_err(panel->base.dev, "failed to add mode %ux%u\n",
255 dt->hactive.typ, dt->vactive.typ);
256 continue;
257 }
258
259 drm_display_mode_from_videomode(&vm, mode);
260
261 mode->type |= DRM_MODE_TYPE_DRIVER;
262
263 if (panel->desc->num_timings == 1)
264 mode->type |= DRM_MODE_TYPE_PREFERRED;
265
266 drm_mode_probed_add(connector, mode);
267 num++;
268 }
269
270 return num;
271 }
272
panel_edp_get_display_modes(struct panel_edp * panel,struct drm_connector * connector)273 static unsigned int panel_edp_get_display_modes(struct panel_edp *panel,
274 struct drm_connector *connector)
275 {
276 struct drm_display_mode *mode;
277 unsigned int i, num = 0;
278
279 for (i = 0; i < panel->desc->num_modes; i++) {
280 const struct drm_display_mode *m = &panel->desc->modes[i];
281
282 mode = drm_mode_duplicate(connector->dev, m);
283 if (!mode) {
284 dev_err(panel->base.dev, "failed to add mode %ux%u@%u\n",
285 m->hdisplay, m->vdisplay,
286 drm_mode_vrefresh(m));
287 continue;
288 }
289
290 mode->type |= DRM_MODE_TYPE_DRIVER;
291
292 if (panel->desc->num_modes == 1)
293 mode->type |= DRM_MODE_TYPE_PREFERRED;
294
295 drm_mode_set_name(mode);
296
297 drm_mode_probed_add(connector, mode);
298 num++;
299 }
300
301 return num;
302 }
303
panel_edp_get_non_edid_modes(struct panel_edp * panel,struct drm_connector * connector)304 static int panel_edp_get_non_edid_modes(struct panel_edp *panel,
305 struct drm_connector *connector)
306 {
307 struct drm_display_mode *mode;
308 bool has_override = panel->override_mode.type;
309 unsigned int num = 0;
310
311 if (!panel->desc)
312 return 0;
313
314 if (has_override) {
315 mode = drm_mode_duplicate(connector->dev,
316 &panel->override_mode);
317 if (mode) {
318 drm_mode_probed_add(connector, mode);
319 num = 1;
320 } else {
321 dev_err(panel->base.dev, "failed to add override mode\n");
322 }
323 }
324
325 /* Only add timings if override was not there or failed to validate */
326 if (num == 0 && panel->desc->num_timings)
327 num = panel_edp_get_timings_modes(panel, connector);
328
329 /*
330 * Only add fixed modes if timings/override added no mode.
331 *
332 * We should only ever have either the display timings specified
333 * or a fixed mode. Anything else is rather bogus.
334 */
335 WARN_ON(panel->desc->num_timings && panel->desc->num_modes);
336 if (num == 0)
337 num = panel_edp_get_display_modes(panel, connector);
338
339 connector->display_info.bpc = panel->desc->bpc;
340 connector->display_info.width_mm = panel->desc->size.width;
341 connector->display_info.height_mm = panel->desc->size.height;
342
343 return num;
344 }
345
panel_edp_wait(ktime_t start_ktime,unsigned int min_ms)346 static void panel_edp_wait(ktime_t start_ktime, unsigned int min_ms)
347 {
348 ktime_t now_ktime, min_ktime;
349
350 if (!min_ms)
351 return;
352
353 min_ktime = ktime_add(start_ktime, ms_to_ktime(min_ms));
354 now_ktime = ktime_get_boottime();
355
356 if (ktime_before(now_ktime, min_ktime))
357 msleep(ktime_to_ms(ktime_sub(min_ktime, now_ktime)) + 1);
358 }
359
panel_edp_disable(struct drm_panel * panel)360 static int panel_edp_disable(struct drm_panel *panel)
361 {
362 struct panel_edp *p = to_panel_edp(panel);
363
364 if (!p->enabled)
365 return 0;
366
367 if (p->desc->delay.disable)
368 msleep(p->desc->delay.disable);
369
370 p->enabled = false;
371
372 return 0;
373 }
374
panel_edp_suspend(struct device * dev)375 static int panel_edp_suspend(struct device *dev)
376 {
377 struct panel_edp *p = dev_get_drvdata(dev);
378
379 gpiod_set_value_cansleep(p->enable_gpio, 0);
380 regulator_disable(p->supply);
381 p->unprepared_time = ktime_get_boottime();
382
383 return 0;
384 }
385
panel_edp_unprepare(struct drm_panel * panel)386 static int panel_edp_unprepare(struct drm_panel *panel)
387 {
388 struct panel_edp *p = to_panel_edp(panel);
389 int ret;
390
391 /* Unpreparing when already unprepared is a no-op */
392 if (!p->prepared)
393 return 0;
394
395 pm_runtime_mark_last_busy(panel->dev);
396 ret = pm_runtime_put_autosuspend(panel->dev);
397 if (ret < 0)
398 return ret;
399 p->prepared = false;
400
401 return 0;
402 }
403
panel_edp_get_hpd_gpio(struct device * dev,struct panel_edp * p)404 static int panel_edp_get_hpd_gpio(struct device *dev, struct panel_edp *p)
405 {
406 p->hpd_gpio = devm_gpiod_get_optional(dev, "hpd", GPIOD_IN);
407 if (IS_ERR(p->hpd_gpio))
408 return dev_err_probe(dev, PTR_ERR(p->hpd_gpio),
409 "failed to get 'hpd' GPIO\n");
410
411 return 0;
412 }
413
panel_edp_can_read_hpd(struct panel_edp * p)414 static bool panel_edp_can_read_hpd(struct panel_edp *p)
415 {
416 return !p->no_hpd && (p->hpd_gpio || (p->aux && p->aux->wait_hpd_asserted));
417 }
418
panel_edp_prepare_once(struct panel_edp * p)419 static int panel_edp_prepare_once(struct panel_edp *p)
420 {
421 struct device *dev = p->base.dev;
422 unsigned int delay;
423 int err;
424 int hpd_asserted;
425 unsigned long hpd_wait_us;
426
427 panel_edp_wait(p->unprepared_time, p->desc->delay.unprepare);
428
429 err = regulator_enable(p->supply);
430 if (err < 0) {
431 dev_err(dev, "failed to enable supply: %d\n", err);
432 return err;
433 }
434
435 gpiod_set_value_cansleep(p->enable_gpio, 1);
436
437 delay = p->desc->delay.hpd_reliable;
438 if (p->no_hpd)
439 delay = max(delay, p->desc->delay.hpd_absent);
440 if (delay)
441 msleep(delay);
442
443 if (panel_edp_can_read_hpd(p)) {
444 if (p->desc->delay.hpd_absent)
445 hpd_wait_us = p->desc->delay.hpd_absent * 1000UL;
446 else
447 hpd_wait_us = 2000000;
448
449 if (p->hpd_gpio) {
450 err = readx_poll_timeout(gpiod_get_value_cansleep,
451 p->hpd_gpio, hpd_asserted,
452 hpd_asserted, 1000, hpd_wait_us);
453 if (hpd_asserted < 0)
454 err = hpd_asserted;
455 } else {
456 err = p->aux->wait_hpd_asserted(p->aux, hpd_wait_us);
457 }
458
459 if (err) {
460 if (err != -ETIMEDOUT)
461 dev_err(dev,
462 "error waiting for hpd GPIO: %d\n", err);
463 goto error;
464 }
465 }
466
467 p->prepared_time = ktime_get_boottime();
468
469 return 0;
470
471 error:
472 gpiod_set_value_cansleep(p->enable_gpio, 0);
473 regulator_disable(p->supply);
474 p->unprepared_time = ktime_get_boottime();
475
476 return err;
477 }
478
479 /*
480 * Some panels simply don't always come up and need to be power cycled to
481 * work properly. We'll allow for a handful of retries.
482 */
483 #define MAX_PANEL_PREPARE_TRIES 5
484
panel_edp_resume(struct device * dev)485 static int panel_edp_resume(struct device *dev)
486 {
487 struct panel_edp *p = dev_get_drvdata(dev);
488 int ret;
489 int try;
490
491 for (try = 0; try < MAX_PANEL_PREPARE_TRIES; try++) {
492 ret = panel_edp_prepare_once(p);
493 if (ret != -ETIMEDOUT)
494 break;
495 }
496
497 if (ret == -ETIMEDOUT)
498 dev_err(dev, "Prepare timeout after %d tries\n", try);
499 else if (try)
500 dev_warn(dev, "Prepare needed %d retries\n", try);
501
502 return ret;
503 }
504
panel_edp_prepare(struct drm_panel * panel)505 static int panel_edp_prepare(struct drm_panel *panel)
506 {
507 struct panel_edp *p = to_panel_edp(panel);
508 int ret;
509
510 /* Preparing when already prepared is a no-op */
511 if (p->prepared)
512 return 0;
513
514 ret = pm_runtime_get_sync(panel->dev);
515 if (ret < 0) {
516 pm_runtime_put_autosuspend(panel->dev);
517 return ret;
518 }
519
520 p->prepared = true;
521
522 return 0;
523 }
524
panel_edp_enable(struct drm_panel * panel)525 static int panel_edp_enable(struct drm_panel *panel)
526 {
527 struct panel_edp *p = to_panel_edp(panel);
528 unsigned int delay;
529
530 if (p->enabled)
531 return 0;
532
533 delay = p->desc->delay.enable;
534
535 /*
536 * If there is a "prepare_to_enable" delay then that's supposed to be
537 * the delay from HPD going high until we can turn the backlight on.
538 * However, we can only count this if HPD is readable by the panel
539 * driver.
540 *
541 * If we aren't handling the HPD pin ourselves then the best we
542 * can do is assume that HPD went high immediately before we were
543 * called (and link training took zero time). Note that "no-hpd"
544 * actually counts as handling HPD ourselves since we're doing the
545 * worst case delay (in prepare) ourselves.
546 *
547 * NOTE: if we ever end up in this "if" statement then we're
548 * guaranteed that the panel_edp_wait() call below will do no delay.
549 * It already handles that case, though, so we don't need any special
550 * code for it.
551 */
552 if (p->desc->delay.prepare_to_enable &&
553 !panel_edp_can_read_hpd(p) && !p->no_hpd)
554 delay = max(delay, p->desc->delay.prepare_to_enable);
555
556 if (delay)
557 msleep(delay);
558
559 panel_edp_wait(p->prepared_time, p->desc->delay.prepare_to_enable);
560
561 p->enabled = true;
562
563 return 0;
564 }
565
panel_edp_get_modes(struct drm_panel * panel,struct drm_connector * connector)566 static int panel_edp_get_modes(struct drm_panel *panel,
567 struct drm_connector *connector)
568 {
569 struct panel_edp *p = to_panel_edp(panel);
570 int num = 0;
571
572 /* probe EDID if a DDC bus is available */
573 if (p->ddc) {
574 pm_runtime_get_sync(panel->dev);
575
576 if (!p->edid)
577 p->edid = drm_get_edid(connector, p->ddc);
578
579 if (p->edid)
580 num += drm_add_edid_modes(connector, p->edid);
581
582 pm_runtime_mark_last_busy(panel->dev);
583 pm_runtime_put_autosuspend(panel->dev);
584 }
585
586 /*
587 * Add hard-coded panel modes. Don't call this if there are no timings
588 * and no modes (the generic edp-panel case) because it will clobber
589 * the display_info that was already set by drm_add_edid_modes().
590 */
591 if (p->desc->num_timings || p->desc->num_modes)
592 num += panel_edp_get_non_edid_modes(p, connector);
593 else if (!num)
594 dev_warn(p->base.dev, "No display modes\n");
595
596 /*
597 * TODO: Remove once all drm drivers call
598 * drm_connector_set_orientation_from_panel()
599 */
600 drm_connector_set_panel_orientation(connector, p->orientation);
601
602 return num;
603 }
604
panel_edp_get_timings(struct drm_panel * panel,unsigned int num_timings,struct display_timing * timings)605 static int panel_edp_get_timings(struct drm_panel *panel,
606 unsigned int num_timings,
607 struct display_timing *timings)
608 {
609 struct panel_edp *p = to_panel_edp(panel);
610 unsigned int i;
611
612 if (p->desc->num_timings < num_timings)
613 num_timings = p->desc->num_timings;
614
615 if (timings)
616 for (i = 0; i < num_timings; i++)
617 timings[i] = p->desc->timings[i];
618
619 return p->desc->num_timings;
620 }
621
panel_edp_get_orientation(struct drm_panel * panel)622 static enum drm_panel_orientation panel_edp_get_orientation(struct drm_panel *panel)
623 {
624 struct panel_edp *p = to_panel_edp(panel);
625
626 return p->orientation;
627 }
628
detected_panel_show(struct seq_file * s,void * data)629 static int detected_panel_show(struct seq_file *s, void *data)
630 {
631 struct drm_panel *panel = s->private;
632 struct panel_edp *p = to_panel_edp(panel);
633
634 if (IS_ERR(p->detected_panel))
635 seq_puts(s, "UNKNOWN\n");
636 else if (!p->detected_panel)
637 seq_puts(s, "HARDCODED\n");
638 else
639 seq_printf(s, "%s\n", p->detected_panel->name);
640
641 return 0;
642 }
643
644 DEFINE_SHOW_ATTRIBUTE(detected_panel);
645
panel_edp_debugfs_init(struct drm_panel * panel,struct dentry * root)646 static void panel_edp_debugfs_init(struct drm_panel *panel, struct dentry *root)
647 {
648 debugfs_create_file("detected_panel", 0600, root, panel, &detected_panel_fops);
649 }
650
651 static const struct drm_panel_funcs panel_edp_funcs = {
652 .disable = panel_edp_disable,
653 .unprepare = panel_edp_unprepare,
654 .prepare = panel_edp_prepare,
655 .enable = panel_edp_enable,
656 .get_modes = panel_edp_get_modes,
657 .get_orientation = panel_edp_get_orientation,
658 .get_timings = panel_edp_get_timings,
659 .debugfs_init = panel_edp_debugfs_init,
660 };
661
662 #define PANEL_EDP_BOUNDS_CHECK(to_check, bounds, field) \
663 (to_check->field.typ >= bounds->field.min && \
664 to_check->field.typ <= bounds->field.max)
panel_edp_parse_panel_timing_node(struct device * dev,struct panel_edp * panel,const struct display_timing * ot)665 static void panel_edp_parse_panel_timing_node(struct device *dev,
666 struct panel_edp *panel,
667 const struct display_timing *ot)
668 {
669 const struct panel_desc *desc = panel->desc;
670 struct videomode vm;
671 unsigned int i;
672
673 if (WARN_ON(desc->num_modes)) {
674 dev_err(dev, "Reject override mode: panel has a fixed mode\n");
675 return;
676 }
677 if (WARN_ON(!desc->num_timings)) {
678 dev_err(dev, "Reject override mode: no timings specified\n");
679 return;
680 }
681
682 for (i = 0; i < panel->desc->num_timings; i++) {
683 const struct display_timing *dt = &panel->desc->timings[i];
684
685 if (!PANEL_EDP_BOUNDS_CHECK(ot, dt, hactive) ||
686 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hfront_porch) ||
687 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hback_porch) ||
688 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hsync_len) ||
689 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vactive) ||
690 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vfront_porch) ||
691 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vback_porch) ||
692 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vsync_len))
693 continue;
694
695 if (ot->flags != dt->flags)
696 continue;
697
698 videomode_from_timing(ot, &vm);
699 drm_display_mode_from_videomode(&vm, &panel->override_mode);
700 panel->override_mode.type |= DRM_MODE_TYPE_DRIVER |
701 DRM_MODE_TYPE_PREFERRED;
702 break;
703 }
704
705 if (WARN_ON(!panel->override_mode.type))
706 dev_err(dev, "Reject override mode: No display_timing found\n");
707 }
708
709 static const struct edp_panel_entry *find_edp_panel(u32 panel_id);
710
generic_edp_panel_probe(struct device * dev,struct panel_edp * panel)711 static int generic_edp_panel_probe(struct device *dev, struct panel_edp *panel)
712 {
713 struct panel_desc *desc;
714 u32 panel_id;
715 char vend[4];
716 u16 product_id;
717 u32 reliable_ms = 0;
718 u32 absent_ms = 0;
719 int ret;
720
721 desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
722 if (!desc)
723 return -ENOMEM;
724 panel->desc = desc;
725
726 /*
727 * Read the dts properties for the initial probe. These are used by
728 * the runtime resume code which will get called by the
729 * pm_runtime_get_sync() call below.
730 */
731 of_property_read_u32(dev->of_node, "hpd-reliable-delay-ms", &reliable_ms);
732 desc->delay.hpd_reliable = reliable_ms;
733 of_property_read_u32(dev->of_node, "hpd-absent-delay-ms", &absent_ms);
734 desc->delay.hpd_absent = absent_ms;
735
736 /* Power the panel on so we can read the EDID */
737 ret = pm_runtime_get_sync(dev);
738 if (ret < 0) {
739 dev_err(dev, "Couldn't power on panel to read EDID: %d\n", ret);
740 goto exit;
741 }
742
743 panel_id = drm_edid_get_panel_id(panel->ddc);
744 if (!panel_id) {
745 dev_err(dev, "Couldn't identify panel via EDID\n");
746 ret = -EIO;
747 goto exit;
748 }
749 drm_edid_decode_panel_id(panel_id, vend, &product_id);
750
751 panel->detected_panel = find_edp_panel(panel_id);
752
753 /*
754 * We're using non-optimized timings and want it really obvious that
755 * someone needs to add an entry to the table, so we'll do a WARN_ON
756 * splat.
757 */
758 if (WARN_ON(!panel->detected_panel)) {
759 dev_warn(dev,
760 "Unknown panel %s %#06x, using conservative timings\n",
761 vend, product_id);
762
763 /*
764 * It's highly likely that the panel will work if we use very
765 * conservative timings, so let's do that. We already know that
766 * the HPD-related delays must have worked since we got this
767 * far, so we really just need the "unprepare" / "enable"
768 * delays. We don't need "prepare_to_enable" since that
769 * overlaps the "enable" delay anyway.
770 *
771 * Nearly all panels have a "unprepare" delay of 500 ms though
772 * there are a few with 1000. Let's stick 2000 in just to be
773 * super conservative.
774 *
775 * An "enable" delay of 80 ms seems the most common, but we'll
776 * throw in 200 ms to be safe.
777 */
778 desc->delay.unprepare = 2000;
779 desc->delay.enable = 200;
780
781 panel->detected_panel = ERR_PTR(-EINVAL);
782 } else {
783 dev_info(dev, "Detected %s %s (%#06x)\n",
784 vend, panel->detected_panel->name, product_id);
785
786 /* Update the delay; everything else comes from EDID */
787 desc->delay = *panel->detected_panel->delay;
788 }
789
790 ret = 0;
791 exit:
792 pm_runtime_mark_last_busy(dev);
793 pm_runtime_put_autosuspend(dev);
794
795 return ret;
796 }
797
panel_edp_probe(struct device * dev,const struct panel_desc * desc,struct drm_dp_aux * aux)798 static int panel_edp_probe(struct device *dev, const struct panel_desc *desc,
799 struct drm_dp_aux *aux)
800 {
801 struct panel_edp *panel;
802 struct display_timing dt;
803 struct device_node *ddc;
804 int err;
805
806 panel = devm_kzalloc(dev, sizeof(*panel), GFP_KERNEL);
807 if (!panel)
808 return -ENOMEM;
809
810 panel->enabled = false;
811 panel->prepared_time = 0;
812 panel->desc = desc;
813 panel->aux = aux;
814
815 panel->no_hpd = of_property_read_bool(dev->of_node, "no-hpd");
816 if (!panel->no_hpd) {
817 err = panel_edp_get_hpd_gpio(dev, panel);
818 if (err)
819 return err;
820 }
821
822 panel->supply = devm_regulator_get(dev, "power");
823 if (IS_ERR(panel->supply))
824 return PTR_ERR(panel->supply);
825
826 panel->enable_gpio = devm_gpiod_get_optional(dev, "enable",
827 GPIOD_OUT_LOW);
828 if (IS_ERR(panel->enable_gpio))
829 return dev_err_probe(dev, PTR_ERR(panel->enable_gpio),
830 "failed to request GPIO\n");
831
832 err = of_drm_get_panel_orientation(dev->of_node, &panel->orientation);
833 if (err) {
834 dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, err);
835 return err;
836 }
837
838 ddc = of_parse_phandle(dev->of_node, "ddc-i2c-bus", 0);
839 if (ddc) {
840 panel->ddc = of_find_i2c_adapter_by_node(ddc);
841 of_node_put(ddc);
842
843 if (!panel->ddc)
844 return -EPROBE_DEFER;
845 } else if (aux) {
846 panel->ddc = &aux->ddc;
847 }
848
849 if (!of_get_display_timing(dev->of_node, "panel-timing", &dt))
850 panel_edp_parse_panel_timing_node(dev, panel, &dt);
851
852 dev_set_drvdata(dev, panel);
853
854 drm_panel_init(&panel->base, dev, &panel_edp_funcs, DRM_MODE_CONNECTOR_eDP);
855
856 err = drm_panel_of_backlight(&panel->base);
857 if (err)
858 goto err_finished_ddc_init;
859
860 /*
861 * We use runtime PM for prepare / unprepare since those power the panel
862 * on and off and those can be very slow operations. This is important
863 * to optimize powering the panel on briefly to read the EDID before
864 * fully enabling the panel.
865 */
866 pm_runtime_enable(dev);
867 pm_runtime_set_autosuspend_delay(dev, 1000);
868 pm_runtime_use_autosuspend(dev);
869
870 if (of_device_is_compatible(dev->of_node, "edp-panel")) {
871 err = generic_edp_panel_probe(dev, panel);
872 if (err) {
873 dev_err_probe(dev, err,
874 "Couldn't detect panel nor find a fallback\n");
875 goto err_finished_pm_runtime;
876 }
877 /* generic_edp_panel_probe() replaces desc in the panel */
878 desc = panel->desc;
879 } else if (desc->bpc != 6 && desc->bpc != 8 && desc->bpc != 10) {
880 dev_warn(dev, "Expected bpc in {6,8,10} but got: %u\n", desc->bpc);
881 }
882
883 if (!panel->base.backlight && panel->aux) {
884 pm_runtime_get_sync(dev);
885 err = drm_panel_dp_aux_backlight(&panel->base, panel->aux);
886 pm_runtime_mark_last_busy(dev);
887 pm_runtime_put_autosuspend(dev);
888 if (err)
889 goto err_finished_pm_runtime;
890 }
891
892 drm_panel_add(&panel->base);
893
894 return 0;
895
896 err_finished_pm_runtime:
897 pm_runtime_dont_use_autosuspend(dev);
898 pm_runtime_disable(dev);
899 err_finished_ddc_init:
900 if (panel->ddc && (!panel->aux || panel->ddc != &panel->aux->ddc))
901 put_device(&panel->ddc->dev);
902
903 return err;
904 }
905
panel_edp_remove(struct device * dev)906 static void panel_edp_remove(struct device *dev)
907 {
908 struct panel_edp *panel = dev_get_drvdata(dev);
909
910 drm_panel_remove(&panel->base);
911 drm_panel_disable(&panel->base);
912 drm_panel_unprepare(&panel->base);
913
914 pm_runtime_dont_use_autosuspend(dev);
915 pm_runtime_disable(dev);
916 if (panel->ddc && (!panel->aux || panel->ddc != &panel->aux->ddc))
917 put_device(&panel->ddc->dev);
918
919 kfree(panel->edid);
920 panel->edid = NULL;
921 }
922
panel_edp_shutdown(struct device * dev)923 static void panel_edp_shutdown(struct device *dev)
924 {
925 struct panel_edp *panel = dev_get_drvdata(dev);
926
927 drm_panel_disable(&panel->base);
928 drm_panel_unprepare(&panel->base);
929 }
930
931 static const struct display_timing auo_b101ean01_timing = {
932 .pixelclock = { 65300000, 72500000, 75000000 },
933 .hactive = { 1280, 1280, 1280 },
934 .hfront_porch = { 18, 119, 119 },
935 .hback_porch = { 21, 21, 21 },
936 .hsync_len = { 32, 32, 32 },
937 .vactive = { 800, 800, 800 },
938 .vfront_porch = { 4, 4, 4 },
939 .vback_porch = { 8, 8, 8 },
940 .vsync_len = { 18, 20, 20 },
941 };
942
943 static const struct panel_desc auo_b101ean01 = {
944 .timings = &auo_b101ean01_timing,
945 .num_timings = 1,
946 .bpc = 6,
947 .size = {
948 .width = 217,
949 .height = 136,
950 },
951 };
952
953 static const struct drm_display_mode auo_b116xak01_mode = {
954 .clock = 69300,
955 .hdisplay = 1366,
956 .hsync_start = 1366 + 48,
957 .hsync_end = 1366 + 48 + 32,
958 .htotal = 1366 + 48 + 32 + 10,
959 .vdisplay = 768,
960 .vsync_start = 768 + 4,
961 .vsync_end = 768 + 4 + 6,
962 .vtotal = 768 + 4 + 6 + 15,
963 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
964 };
965
966 static const struct panel_desc auo_b116xak01 = {
967 .modes = &auo_b116xak01_mode,
968 .num_modes = 1,
969 .bpc = 6,
970 .size = {
971 .width = 256,
972 .height = 144,
973 },
974 .delay = {
975 .hpd_absent = 200,
976 },
977 };
978
979 static const struct drm_display_mode auo_b133han05_mode = {
980 .clock = 142600,
981 .hdisplay = 1920,
982 .hsync_start = 1920 + 58,
983 .hsync_end = 1920 + 58 + 42,
984 .htotal = 1920 + 58 + 42 + 60,
985 .vdisplay = 1080,
986 .vsync_start = 1080 + 3,
987 .vsync_end = 1080 + 3 + 5,
988 .vtotal = 1080 + 3 + 5 + 54,
989 };
990
991 static const struct panel_desc auo_b133han05 = {
992 .modes = &auo_b133han05_mode,
993 .num_modes = 1,
994 .bpc = 8,
995 .size = {
996 .width = 293,
997 .height = 165,
998 },
999 .delay = {
1000 .hpd_reliable = 100,
1001 .enable = 20,
1002 .unprepare = 50,
1003 },
1004 };
1005
1006 static const struct drm_display_mode auo_b133htn01_mode = {
1007 .clock = 150660,
1008 .hdisplay = 1920,
1009 .hsync_start = 1920 + 172,
1010 .hsync_end = 1920 + 172 + 80,
1011 .htotal = 1920 + 172 + 80 + 60,
1012 .vdisplay = 1080,
1013 .vsync_start = 1080 + 25,
1014 .vsync_end = 1080 + 25 + 10,
1015 .vtotal = 1080 + 25 + 10 + 10,
1016 };
1017
1018 static const struct panel_desc auo_b133htn01 = {
1019 .modes = &auo_b133htn01_mode,
1020 .num_modes = 1,
1021 .bpc = 6,
1022 .size = {
1023 .width = 293,
1024 .height = 165,
1025 },
1026 .delay = {
1027 .hpd_reliable = 105,
1028 .enable = 20,
1029 .unprepare = 50,
1030 },
1031 };
1032
1033 static const struct drm_display_mode auo_b133xtn01_mode = {
1034 .clock = 69500,
1035 .hdisplay = 1366,
1036 .hsync_start = 1366 + 48,
1037 .hsync_end = 1366 + 48 + 32,
1038 .htotal = 1366 + 48 + 32 + 20,
1039 .vdisplay = 768,
1040 .vsync_start = 768 + 3,
1041 .vsync_end = 768 + 3 + 6,
1042 .vtotal = 768 + 3 + 6 + 13,
1043 };
1044
1045 static const struct panel_desc auo_b133xtn01 = {
1046 .modes = &auo_b133xtn01_mode,
1047 .num_modes = 1,
1048 .bpc = 6,
1049 .size = {
1050 .width = 293,
1051 .height = 165,
1052 },
1053 };
1054
1055 static const struct drm_display_mode auo_b140han06_mode = {
1056 .clock = 141000,
1057 .hdisplay = 1920,
1058 .hsync_start = 1920 + 16,
1059 .hsync_end = 1920 + 16 + 16,
1060 .htotal = 1920 + 16 + 16 + 152,
1061 .vdisplay = 1080,
1062 .vsync_start = 1080 + 3,
1063 .vsync_end = 1080 + 3 + 14,
1064 .vtotal = 1080 + 3 + 14 + 19,
1065 };
1066
1067 static const struct panel_desc auo_b140han06 = {
1068 .modes = &auo_b140han06_mode,
1069 .num_modes = 1,
1070 .bpc = 8,
1071 .size = {
1072 .width = 309,
1073 .height = 174,
1074 },
1075 .delay = {
1076 .hpd_reliable = 100,
1077 .enable = 20,
1078 .unprepare = 50,
1079 },
1080 };
1081
1082 static const struct drm_display_mode boe_nv101wxmn51_modes[] = {
1083 {
1084 .clock = 71900,
1085 .hdisplay = 1280,
1086 .hsync_start = 1280 + 48,
1087 .hsync_end = 1280 + 48 + 32,
1088 .htotal = 1280 + 48 + 32 + 80,
1089 .vdisplay = 800,
1090 .vsync_start = 800 + 3,
1091 .vsync_end = 800 + 3 + 5,
1092 .vtotal = 800 + 3 + 5 + 24,
1093 },
1094 {
1095 .clock = 57500,
1096 .hdisplay = 1280,
1097 .hsync_start = 1280 + 48,
1098 .hsync_end = 1280 + 48 + 32,
1099 .htotal = 1280 + 48 + 32 + 80,
1100 .vdisplay = 800,
1101 .vsync_start = 800 + 3,
1102 .vsync_end = 800 + 3 + 5,
1103 .vtotal = 800 + 3 + 5 + 24,
1104 },
1105 };
1106
1107 static const struct panel_desc boe_nv101wxmn51 = {
1108 .modes = boe_nv101wxmn51_modes,
1109 .num_modes = ARRAY_SIZE(boe_nv101wxmn51_modes),
1110 .bpc = 8,
1111 .size = {
1112 .width = 217,
1113 .height = 136,
1114 },
1115 .delay = {
1116 /* TODO: should be hpd-absent and no-hpd should be set? */
1117 .hpd_reliable = 210,
1118 .enable = 50,
1119 .unprepare = 160,
1120 },
1121 };
1122
1123 static const struct drm_display_mode boe_nv110wtm_n61_modes[] = {
1124 {
1125 .clock = 207800,
1126 .hdisplay = 2160,
1127 .hsync_start = 2160 + 48,
1128 .hsync_end = 2160 + 48 + 32,
1129 .htotal = 2160 + 48 + 32 + 100,
1130 .vdisplay = 1440,
1131 .vsync_start = 1440 + 3,
1132 .vsync_end = 1440 + 3 + 6,
1133 .vtotal = 1440 + 3 + 6 + 31,
1134 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC,
1135 },
1136 {
1137 .clock = 138500,
1138 .hdisplay = 2160,
1139 .hsync_start = 2160 + 48,
1140 .hsync_end = 2160 + 48 + 32,
1141 .htotal = 2160 + 48 + 32 + 100,
1142 .vdisplay = 1440,
1143 .vsync_start = 1440 + 3,
1144 .vsync_end = 1440 + 3 + 6,
1145 .vtotal = 1440 + 3 + 6 + 31,
1146 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC,
1147 },
1148 };
1149
1150 static const struct panel_desc boe_nv110wtm_n61 = {
1151 .modes = boe_nv110wtm_n61_modes,
1152 .num_modes = ARRAY_SIZE(boe_nv110wtm_n61_modes),
1153 .bpc = 8,
1154 .size = {
1155 .width = 233,
1156 .height = 155,
1157 },
1158 .delay = {
1159 .hpd_absent = 200,
1160 .prepare_to_enable = 80,
1161 .enable = 50,
1162 .unprepare = 500,
1163 },
1164 };
1165
1166 /* Also used for boe_nv133fhm_n62 */
1167 static const struct drm_display_mode boe_nv133fhm_n61_modes = {
1168 .clock = 147840,
1169 .hdisplay = 1920,
1170 .hsync_start = 1920 + 48,
1171 .hsync_end = 1920 + 48 + 32,
1172 .htotal = 1920 + 48 + 32 + 200,
1173 .vdisplay = 1080,
1174 .vsync_start = 1080 + 3,
1175 .vsync_end = 1080 + 3 + 6,
1176 .vtotal = 1080 + 3 + 6 + 31,
1177 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC,
1178 };
1179
1180 /* Also used for boe_nv133fhm_n62 */
1181 static const struct panel_desc boe_nv133fhm_n61 = {
1182 .modes = &boe_nv133fhm_n61_modes,
1183 .num_modes = 1,
1184 .bpc = 6,
1185 .size = {
1186 .width = 294,
1187 .height = 165,
1188 },
1189 .delay = {
1190 /*
1191 * When power is first given to the panel there's a short
1192 * spike on the HPD line. It was explained that this spike
1193 * was until the TCON data download was complete. On
1194 * one system this was measured at 8 ms. We'll put 15 ms
1195 * in the prepare delay just to be safe. That means:
1196 * - If HPD isn't hooked up you still have 200 ms delay.
1197 * - If HPD is hooked up we won't try to look at it for the
1198 * first 15 ms.
1199 */
1200 .hpd_reliable = 15,
1201 .hpd_absent = 200,
1202
1203 .unprepare = 500,
1204 },
1205 };
1206
1207 static const struct drm_display_mode boe_nv140fhmn49_modes[] = {
1208 {
1209 .clock = 148500,
1210 .hdisplay = 1920,
1211 .hsync_start = 1920 + 48,
1212 .hsync_end = 1920 + 48 + 32,
1213 .htotal = 2200,
1214 .vdisplay = 1080,
1215 .vsync_start = 1080 + 3,
1216 .vsync_end = 1080 + 3 + 5,
1217 .vtotal = 1125,
1218 },
1219 };
1220
1221 static const struct panel_desc boe_nv140fhmn49 = {
1222 .modes = boe_nv140fhmn49_modes,
1223 .num_modes = ARRAY_SIZE(boe_nv140fhmn49_modes),
1224 .bpc = 6,
1225 .size = {
1226 .width = 309,
1227 .height = 174,
1228 },
1229 .delay = {
1230 /* TODO: should be hpd-absent and no-hpd should be set? */
1231 .hpd_reliable = 210,
1232 .enable = 50,
1233 .unprepare = 160,
1234 },
1235 };
1236
1237 static const struct drm_display_mode innolux_n116bca_ea1_mode = {
1238 .clock = 76420,
1239 .hdisplay = 1366,
1240 .hsync_start = 1366 + 136,
1241 .hsync_end = 1366 + 136 + 30,
1242 .htotal = 1366 + 136 + 30 + 60,
1243 .vdisplay = 768,
1244 .vsync_start = 768 + 8,
1245 .vsync_end = 768 + 8 + 12,
1246 .vtotal = 768 + 8 + 12 + 12,
1247 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
1248 };
1249
1250 static const struct panel_desc innolux_n116bca_ea1 = {
1251 .modes = &innolux_n116bca_ea1_mode,
1252 .num_modes = 1,
1253 .bpc = 6,
1254 .size = {
1255 .width = 256,
1256 .height = 144,
1257 },
1258 .delay = {
1259 .hpd_absent = 200,
1260 .enable = 80,
1261 .disable = 50,
1262 .unprepare = 500,
1263 },
1264 };
1265
1266 /*
1267 * Datasheet specifies that at 60 Hz refresh rate:
1268 * - total horizontal time: { 1506, 1592, 1716 }
1269 * - total vertical time: { 788, 800, 868 }
1270 *
1271 * ...but doesn't go into exactly how that should be split into a front
1272 * porch, back porch, or sync length. For now we'll leave a single setting
1273 * here which allows a bit of tweaking of the pixel clock at the expense of
1274 * refresh rate.
1275 */
1276 static const struct display_timing innolux_n116bge_timing = {
1277 .pixelclock = { 72600000, 76420000, 80240000 },
1278 .hactive = { 1366, 1366, 1366 },
1279 .hfront_porch = { 136, 136, 136 },
1280 .hback_porch = { 60, 60, 60 },
1281 .hsync_len = { 30, 30, 30 },
1282 .vactive = { 768, 768, 768 },
1283 .vfront_porch = { 8, 8, 8 },
1284 .vback_porch = { 12, 12, 12 },
1285 .vsync_len = { 12, 12, 12 },
1286 .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW,
1287 };
1288
1289 static const struct panel_desc innolux_n116bge = {
1290 .timings = &innolux_n116bge_timing,
1291 .num_timings = 1,
1292 .bpc = 6,
1293 .size = {
1294 .width = 256,
1295 .height = 144,
1296 },
1297 };
1298
1299 static const struct drm_display_mode innolux_n125hce_gn1_mode = {
1300 .clock = 162000,
1301 .hdisplay = 1920,
1302 .hsync_start = 1920 + 40,
1303 .hsync_end = 1920 + 40 + 40,
1304 .htotal = 1920 + 40 + 40 + 80,
1305 .vdisplay = 1080,
1306 .vsync_start = 1080 + 4,
1307 .vsync_end = 1080 + 4 + 4,
1308 .vtotal = 1080 + 4 + 4 + 24,
1309 };
1310
1311 static const struct panel_desc innolux_n125hce_gn1 = {
1312 .modes = &innolux_n125hce_gn1_mode,
1313 .num_modes = 1,
1314 .bpc = 8,
1315 .size = {
1316 .width = 276,
1317 .height = 155,
1318 },
1319 };
1320
1321 static const struct drm_display_mode innolux_p120zdg_bf1_mode = {
1322 .clock = 206016,
1323 .hdisplay = 2160,
1324 .hsync_start = 2160 + 48,
1325 .hsync_end = 2160 + 48 + 32,
1326 .htotal = 2160 + 48 + 32 + 80,
1327 .vdisplay = 1440,
1328 .vsync_start = 1440 + 3,
1329 .vsync_end = 1440 + 3 + 10,
1330 .vtotal = 1440 + 3 + 10 + 27,
1331 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
1332 };
1333
1334 static const struct panel_desc innolux_p120zdg_bf1 = {
1335 .modes = &innolux_p120zdg_bf1_mode,
1336 .num_modes = 1,
1337 .bpc = 8,
1338 .size = {
1339 .width = 254,
1340 .height = 169,
1341 },
1342 .delay = {
1343 .hpd_absent = 200,
1344 .unprepare = 500,
1345 },
1346 };
1347
1348 static const struct drm_display_mode ivo_m133nwf4_r0_mode = {
1349 .clock = 138778,
1350 .hdisplay = 1920,
1351 .hsync_start = 1920 + 24,
1352 .hsync_end = 1920 + 24 + 48,
1353 .htotal = 1920 + 24 + 48 + 88,
1354 .vdisplay = 1080,
1355 .vsync_start = 1080 + 3,
1356 .vsync_end = 1080 + 3 + 12,
1357 .vtotal = 1080 + 3 + 12 + 17,
1358 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
1359 };
1360
1361 static const struct panel_desc ivo_m133nwf4_r0 = {
1362 .modes = &ivo_m133nwf4_r0_mode,
1363 .num_modes = 1,
1364 .bpc = 8,
1365 .size = {
1366 .width = 294,
1367 .height = 165,
1368 },
1369 .delay = {
1370 .hpd_absent = 200,
1371 .unprepare = 500,
1372 },
1373 };
1374
1375 static const struct drm_display_mode kingdisplay_kd116n21_30nv_a010_mode = {
1376 .clock = 81000,
1377 .hdisplay = 1366,
1378 .hsync_start = 1366 + 40,
1379 .hsync_end = 1366 + 40 + 32,
1380 .htotal = 1366 + 40 + 32 + 62,
1381 .vdisplay = 768,
1382 .vsync_start = 768 + 5,
1383 .vsync_end = 768 + 5 + 5,
1384 .vtotal = 768 + 5 + 5 + 122,
1385 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1386 };
1387
1388 static const struct panel_desc kingdisplay_kd116n21_30nv_a010 = {
1389 .modes = &kingdisplay_kd116n21_30nv_a010_mode,
1390 .num_modes = 1,
1391 .bpc = 6,
1392 .size = {
1393 .width = 256,
1394 .height = 144,
1395 },
1396 .delay = {
1397 .hpd_absent = 200,
1398 },
1399 };
1400
1401 static const struct drm_display_mode lg_lp079qx1_sp0v_mode = {
1402 .clock = 200000,
1403 .hdisplay = 1536,
1404 .hsync_start = 1536 + 12,
1405 .hsync_end = 1536 + 12 + 16,
1406 .htotal = 1536 + 12 + 16 + 48,
1407 .vdisplay = 2048,
1408 .vsync_start = 2048 + 8,
1409 .vsync_end = 2048 + 8 + 4,
1410 .vtotal = 2048 + 8 + 4 + 8,
1411 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1412 };
1413
1414 static const struct panel_desc lg_lp079qx1_sp0v = {
1415 .modes = &lg_lp079qx1_sp0v_mode,
1416 .num_modes = 1,
1417 .size = {
1418 .width = 129,
1419 .height = 171,
1420 },
1421 };
1422
1423 static const struct drm_display_mode lg_lp097qx1_spa1_mode = {
1424 .clock = 205210,
1425 .hdisplay = 2048,
1426 .hsync_start = 2048 + 150,
1427 .hsync_end = 2048 + 150 + 5,
1428 .htotal = 2048 + 150 + 5 + 5,
1429 .vdisplay = 1536,
1430 .vsync_start = 1536 + 3,
1431 .vsync_end = 1536 + 3 + 1,
1432 .vtotal = 1536 + 3 + 1 + 9,
1433 };
1434
1435 static const struct panel_desc lg_lp097qx1_spa1 = {
1436 .modes = &lg_lp097qx1_spa1_mode,
1437 .num_modes = 1,
1438 .size = {
1439 .width = 208,
1440 .height = 147,
1441 },
1442 };
1443
1444 static const struct drm_display_mode lg_lp120up1_mode = {
1445 .clock = 162300,
1446 .hdisplay = 1920,
1447 .hsync_start = 1920 + 40,
1448 .hsync_end = 1920 + 40 + 40,
1449 .htotal = 1920 + 40 + 40 + 80,
1450 .vdisplay = 1280,
1451 .vsync_start = 1280 + 4,
1452 .vsync_end = 1280 + 4 + 4,
1453 .vtotal = 1280 + 4 + 4 + 12,
1454 };
1455
1456 static const struct panel_desc lg_lp120up1 = {
1457 .modes = &lg_lp120up1_mode,
1458 .num_modes = 1,
1459 .bpc = 8,
1460 .size = {
1461 .width = 267,
1462 .height = 183,
1463 },
1464 };
1465
1466 static const struct drm_display_mode lg_lp129qe_mode = {
1467 .clock = 285250,
1468 .hdisplay = 2560,
1469 .hsync_start = 2560 + 48,
1470 .hsync_end = 2560 + 48 + 32,
1471 .htotal = 2560 + 48 + 32 + 80,
1472 .vdisplay = 1700,
1473 .vsync_start = 1700 + 3,
1474 .vsync_end = 1700 + 3 + 10,
1475 .vtotal = 1700 + 3 + 10 + 36,
1476 };
1477
1478 static const struct panel_desc lg_lp129qe = {
1479 .modes = &lg_lp129qe_mode,
1480 .num_modes = 1,
1481 .bpc = 8,
1482 .size = {
1483 .width = 272,
1484 .height = 181,
1485 },
1486 };
1487
1488 static const struct drm_display_mode neweast_wjfh116008a_modes[] = {
1489 {
1490 .clock = 138500,
1491 .hdisplay = 1920,
1492 .hsync_start = 1920 + 48,
1493 .hsync_end = 1920 + 48 + 32,
1494 .htotal = 1920 + 48 + 32 + 80,
1495 .vdisplay = 1080,
1496 .vsync_start = 1080 + 3,
1497 .vsync_end = 1080 + 3 + 5,
1498 .vtotal = 1080 + 3 + 5 + 23,
1499 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1500 }, {
1501 .clock = 110920,
1502 .hdisplay = 1920,
1503 .hsync_start = 1920 + 48,
1504 .hsync_end = 1920 + 48 + 32,
1505 .htotal = 1920 + 48 + 32 + 80,
1506 .vdisplay = 1080,
1507 .vsync_start = 1080 + 3,
1508 .vsync_end = 1080 + 3 + 5,
1509 .vtotal = 1080 + 3 + 5 + 23,
1510 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1511 }
1512 };
1513
1514 static const struct panel_desc neweast_wjfh116008a = {
1515 .modes = neweast_wjfh116008a_modes,
1516 .num_modes = 2,
1517 .bpc = 6,
1518 .size = {
1519 .width = 260,
1520 .height = 150,
1521 },
1522 .delay = {
1523 .hpd_reliable = 110,
1524 .enable = 20,
1525 .unprepare = 500,
1526 },
1527 };
1528
1529 static const struct drm_display_mode samsung_lsn122dl01_c01_mode = {
1530 .clock = 271560,
1531 .hdisplay = 2560,
1532 .hsync_start = 2560 + 48,
1533 .hsync_end = 2560 + 48 + 32,
1534 .htotal = 2560 + 48 + 32 + 80,
1535 .vdisplay = 1600,
1536 .vsync_start = 1600 + 2,
1537 .vsync_end = 1600 + 2 + 5,
1538 .vtotal = 1600 + 2 + 5 + 57,
1539 };
1540
1541 static const struct panel_desc samsung_lsn122dl01_c01 = {
1542 .modes = &samsung_lsn122dl01_c01_mode,
1543 .num_modes = 1,
1544 .size = {
1545 .width = 263,
1546 .height = 164,
1547 },
1548 };
1549
1550 static const struct drm_display_mode samsung_ltn140at29_301_mode = {
1551 .clock = 76300,
1552 .hdisplay = 1366,
1553 .hsync_start = 1366 + 64,
1554 .hsync_end = 1366 + 64 + 48,
1555 .htotal = 1366 + 64 + 48 + 128,
1556 .vdisplay = 768,
1557 .vsync_start = 768 + 2,
1558 .vsync_end = 768 + 2 + 5,
1559 .vtotal = 768 + 2 + 5 + 17,
1560 };
1561
1562 static const struct panel_desc samsung_ltn140at29_301 = {
1563 .modes = &samsung_ltn140at29_301_mode,
1564 .num_modes = 1,
1565 .bpc = 6,
1566 .size = {
1567 .width = 320,
1568 .height = 187,
1569 },
1570 };
1571
1572 static const struct drm_display_mode sharp_ld_d5116z01b_mode = {
1573 .clock = 168480,
1574 .hdisplay = 1920,
1575 .hsync_start = 1920 + 48,
1576 .hsync_end = 1920 + 48 + 32,
1577 .htotal = 1920 + 48 + 32 + 80,
1578 .vdisplay = 1280,
1579 .vsync_start = 1280 + 3,
1580 .vsync_end = 1280 + 3 + 10,
1581 .vtotal = 1280 + 3 + 10 + 57,
1582 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
1583 };
1584
1585 static const struct panel_desc sharp_ld_d5116z01b = {
1586 .modes = &sharp_ld_d5116z01b_mode,
1587 .num_modes = 1,
1588 .bpc = 8,
1589 .size = {
1590 .width = 260,
1591 .height = 120,
1592 },
1593 };
1594
1595 static const struct display_timing sharp_lq123p1jx31_timing = {
1596 .pixelclock = { 252750000, 252750000, 266604720 },
1597 .hactive = { 2400, 2400, 2400 },
1598 .hfront_porch = { 48, 48, 48 },
1599 .hback_porch = { 80, 80, 84 },
1600 .hsync_len = { 32, 32, 32 },
1601 .vactive = { 1600, 1600, 1600 },
1602 .vfront_porch = { 3, 3, 3 },
1603 .vback_porch = { 33, 33, 120 },
1604 .vsync_len = { 10, 10, 10 },
1605 .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW,
1606 };
1607
1608 static const struct panel_desc sharp_lq123p1jx31 = {
1609 .timings = &sharp_lq123p1jx31_timing,
1610 .num_timings = 1,
1611 .bpc = 8,
1612 .size = {
1613 .width = 259,
1614 .height = 173,
1615 },
1616 .delay = {
1617 .hpd_reliable = 110,
1618 .enable = 50,
1619 .unprepare = 550,
1620 },
1621 };
1622
1623 static const struct drm_display_mode sharp_lq140m1jw46_mode[] = {
1624 {
1625 .clock = 346500,
1626 .hdisplay = 1920,
1627 .hsync_start = 1920 + 48,
1628 .hsync_end = 1920 + 48 + 32,
1629 .htotal = 1920 + 48 + 32 + 80,
1630 .vdisplay = 1080,
1631 .vsync_start = 1080 + 3,
1632 .vsync_end = 1080 + 3 + 5,
1633 .vtotal = 1080 + 3 + 5 + 69,
1634 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1635 }, {
1636 .clock = 144370,
1637 .hdisplay = 1920,
1638 .hsync_start = 1920 + 48,
1639 .hsync_end = 1920 + 48 + 32,
1640 .htotal = 1920 + 48 + 32 + 80,
1641 .vdisplay = 1080,
1642 .vsync_start = 1080 + 3,
1643 .vsync_end = 1080 + 3 + 5,
1644 .vtotal = 1080 + 3 + 5 + 69,
1645 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1646 },
1647 };
1648
1649 static const struct panel_desc sharp_lq140m1jw46 = {
1650 .modes = sharp_lq140m1jw46_mode,
1651 .num_modes = ARRAY_SIZE(sharp_lq140m1jw46_mode),
1652 .bpc = 8,
1653 .size = {
1654 .width = 309,
1655 .height = 174,
1656 },
1657 .delay = {
1658 .hpd_absent = 80,
1659 .enable = 50,
1660 .unprepare = 500,
1661 },
1662 };
1663
1664 static const struct drm_display_mode starry_kr122ea0sra_mode = {
1665 .clock = 147000,
1666 .hdisplay = 1920,
1667 .hsync_start = 1920 + 16,
1668 .hsync_end = 1920 + 16 + 16,
1669 .htotal = 1920 + 16 + 16 + 32,
1670 .vdisplay = 1200,
1671 .vsync_start = 1200 + 15,
1672 .vsync_end = 1200 + 15 + 2,
1673 .vtotal = 1200 + 15 + 2 + 18,
1674 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1675 };
1676
1677 static const struct panel_desc starry_kr122ea0sra = {
1678 .modes = &starry_kr122ea0sra_mode,
1679 .num_modes = 1,
1680 .size = {
1681 .width = 263,
1682 .height = 164,
1683 },
1684 .delay = {
1685 /* TODO: should be hpd-absent and no-hpd should be set? */
1686 .hpd_reliable = 10 + 200,
1687 .enable = 50,
1688 .unprepare = 10 + 500,
1689 },
1690 };
1691
1692 static const struct of_device_id platform_of_match[] = {
1693 {
1694 /* Must be first */
1695 .compatible = "edp-panel",
1696 }, {
1697 .compatible = "auo,b101ean01",
1698 .data = &auo_b101ean01,
1699 }, {
1700 .compatible = "auo,b116xa01",
1701 .data = &auo_b116xak01,
1702 }, {
1703 .compatible = "auo,b133han05",
1704 .data = &auo_b133han05,
1705 }, {
1706 .compatible = "auo,b133htn01",
1707 .data = &auo_b133htn01,
1708 }, {
1709 .compatible = "auo,b133xtn01",
1710 .data = &auo_b133xtn01,
1711 }, {
1712 .compatible = "auo,b140han06",
1713 .data = &auo_b140han06,
1714 }, {
1715 .compatible = "boe,nv101wxmn51",
1716 .data = &boe_nv101wxmn51,
1717 }, {
1718 .compatible = "boe,nv110wtm-n61",
1719 .data = &boe_nv110wtm_n61,
1720 }, {
1721 .compatible = "boe,nv133fhm-n61",
1722 .data = &boe_nv133fhm_n61,
1723 }, {
1724 .compatible = "boe,nv133fhm-n62",
1725 .data = &boe_nv133fhm_n61,
1726 }, {
1727 .compatible = "boe,nv140fhmn49",
1728 .data = &boe_nv140fhmn49,
1729 }, {
1730 .compatible = "innolux,n116bca-ea1",
1731 .data = &innolux_n116bca_ea1,
1732 }, {
1733 .compatible = "innolux,n116bge",
1734 .data = &innolux_n116bge,
1735 }, {
1736 .compatible = "innolux,n125hce-gn1",
1737 .data = &innolux_n125hce_gn1,
1738 }, {
1739 .compatible = "innolux,p120zdg-bf1",
1740 .data = &innolux_p120zdg_bf1,
1741 }, {
1742 .compatible = "ivo,m133nwf4-r0",
1743 .data = &ivo_m133nwf4_r0,
1744 }, {
1745 .compatible = "kingdisplay,kd116n21-30nv-a010",
1746 .data = &kingdisplay_kd116n21_30nv_a010,
1747 }, {
1748 .compatible = "lg,lp079qx1-sp0v",
1749 .data = &lg_lp079qx1_sp0v,
1750 }, {
1751 .compatible = "lg,lp097qx1-spa1",
1752 .data = &lg_lp097qx1_spa1,
1753 }, {
1754 .compatible = "lg,lp120up1",
1755 .data = &lg_lp120up1,
1756 }, {
1757 .compatible = "lg,lp129qe",
1758 .data = &lg_lp129qe,
1759 }, {
1760 .compatible = "neweast,wjfh116008a",
1761 .data = &neweast_wjfh116008a,
1762 }, {
1763 .compatible = "samsung,lsn122dl01-c01",
1764 .data = &samsung_lsn122dl01_c01,
1765 }, {
1766 .compatible = "samsung,ltn140at29-301",
1767 .data = &samsung_ltn140at29_301,
1768 }, {
1769 .compatible = "sharp,ld-d5116z01b",
1770 .data = &sharp_ld_d5116z01b,
1771 }, {
1772 .compatible = "sharp,lq123p1jx31",
1773 .data = &sharp_lq123p1jx31,
1774 }, {
1775 .compatible = "sharp,lq140m1jw46",
1776 .data = &sharp_lq140m1jw46,
1777 }, {
1778 .compatible = "starry,kr122ea0sra",
1779 .data = &starry_kr122ea0sra,
1780 }, {
1781 /* sentinel */
1782 }
1783 };
1784 MODULE_DEVICE_TABLE(of, platform_of_match);
1785
1786 static const struct panel_delay delay_200_500_p2e80 = {
1787 .hpd_absent = 200,
1788 .unprepare = 500,
1789 .prepare_to_enable = 80,
1790 };
1791
1792 static const struct panel_delay delay_200_500_p2e100 = {
1793 .hpd_absent = 200,
1794 .unprepare = 500,
1795 .prepare_to_enable = 100,
1796 };
1797
1798 static const struct panel_delay delay_200_500_e50 = {
1799 .hpd_absent = 200,
1800 .unprepare = 500,
1801 .enable = 50,
1802 };
1803
1804 static const struct panel_delay delay_200_500_e80_d50 = {
1805 .hpd_absent = 200,
1806 .unprepare = 500,
1807 .enable = 80,
1808 .disable = 50,
1809 };
1810
1811 static const struct panel_delay delay_100_500_e200 = {
1812 .hpd_absent = 100,
1813 .unprepare = 500,
1814 .enable = 200,
1815 };
1816
1817 static const struct panel_delay delay_200_500_e200 = {
1818 .hpd_absent = 200,
1819 .unprepare = 500,
1820 .enable = 200,
1821 };
1822
1823 #define EDP_PANEL_ENTRY(vend_chr_0, vend_chr_1, vend_chr_2, product_id, _delay, _name) \
1824 { \
1825 .name = _name, \
1826 .panel_id = drm_edid_encode_panel_id(vend_chr_0, vend_chr_1, vend_chr_2, \
1827 product_id), \
1828 .delay = _delay \
1829 }
1830
1831 /*
1832 * This table is used to figure out power sequencing delays for panels that
1833 * are detected by EDID. Entries here may point to entries in the
1834 * platform_of_match table (if a panel is listed in both places).
1835 *
1836 * Sort first by vendor, then by product ID.
1837 */
1838 static const struct edp_panel_entry edp_panels[] = {
1839 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1062, &delay_200_500_e50, "B120XAN01.0"),
1840 EDP_PANEL_ENTRY('A', 'U', 'O', 0x145c, &delay_200_500_e50, "B116XAB01.4"),
1841 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1e9b, &delay_200_500_e50, "B133UAN02.1"),
1842 EDP_PANEL_ENTRY('A', 'U', 'O', 0x1ea5, &delay_200_500_e50, "B116XAK01.6"),
1843 EDP_PANEL_ENTRY('A', 'U', 'O', 0x405c, &auo_b116xak01.delay, "B116XAK01"),
1844 EDP_PANEL_ENTRY('A', 'U', 'O', 0x582d, &delay_200_500_e50, "B133UAN01.0"),
1845 EDP_PANEL_ENTRY('A', 'U', 'O', 0x615c, &delay_200_500_e50, "B116XAN06.1"),
1846 EDP_PANEL_ENTRY('A', 'U', 'O', 0x8594, &delay_200_500_e50, "B133UAN01.0"),
1847
1848 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0786, &delay_200_500_p2e80, "NV116WHM-T01"),
1849 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07d1, &boe_nv133fhm_n61.delay, "NV133FHM-N61"),
1850 EDP_PANEL_ENTRY('B', 'O', 'E', 0x082d, &boe_nv133fhm_n61.delay, "NV133FHM-N62"),
1851 EDP_PANEL_ENTRY('B', 'O', 'E', 0x094b, &delay_200_500_e50, "NT116WHM-N21"),
1852 EDP_PANEL_ENTRY('B', 'O', 'E', 0x095f, &delay_200_500_e50, "NE135FBM-N41 v8.1"),
1853 EDP_PANEL_ENTRY('B', 'O', 'E', 0x098d, &boe_nv110wtm_n61.delay, "NV110WTM-N61"),
1854 EDP_PANEL_ENTRY('B', 'O', 'E', 0x09dd, &delay_200_500_e50, "NT116WHM-N21"),
1855 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a5d, &delay_200_500_e50, "NV116WHM-N45"),
1856 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0ac5, &delay_200_500_e50, "NV116WHM-N4C"),
1857
1858 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1139, &delay_200_500_e80_d50, "N116BGE-EA2"),
1859 EDP_PANEL_ENTRY('C', 'M', 'N', 0x114c, &innolux_n116bca_ea1.delay, "N116BCA-EA1"),
1860 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1152, &delay_200_500_e80_d50, "N116BCN-EA1"),
1861 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1153, &delay_200_500_e80_d50, "N116BGE-EA2"),
1862 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1154, &delay_200_500_e80_d50, "N116BCA-EA2"),
1863 EDP_PANEL_ENTRY('C', 'M', 'N', 0x1247, &delay_200_500_e80_d50, "N120ACA-EA1"),
1864 EDP_PANEL_ENTRY('C', 'M', 'N', 0x14d4, &delay_200_500_e80_d50, "N140HCA-EAC"),
1865
1866 EDP_PANEL_ENTRY('I', 'V', 'O', 0x057d, &delay_200_500_e200, "R140NWF5 RH"),
1867 EDP_PANEL_ENTRY('I', 'V', 'O', 0x854a, &delay_200_500_p2e100, "M133NW4J"),
1868 EDP_PANEL_ENTRY('I', 'V', 'O', 0x854b, &delay_200_500_p2e100, "R133NW4K-R0"),
1869
1870 EDP_PANEL_ENTRY('K', 'D', 'B', 0x0624, &kingdisplay_kd116n21_30nv_a010.delay, "116N21-30NV-A010"),
1871 EDP_PANEL_ENTRY('K', 'D', 'B', 0x1120, &delay_200_500_e80_d50, "116N29-30NK-C007"),
1872
1873 EDP_PANEL_ENTRY('S', 'H', 'P', 0x1511, &delay_200_500_e50, "LQ140M1JW48"),
1874 EDP_PANEL_ENTRY('S', 'H', 'P', 0x1523, &sharp_lq140m1jw46.delay, "LQ140M1JW46"),
1875 EDP_PANEL_ENTRY('S', 'H', 'P', 0x154c, &delay_200_500_p2e100, "LQ116M1JW10"),
1876
1877 EDP_PANEL_ENTRY('S', 'T', 'A', 0x0100, &delay_100_500_e200, "2081116HHD028001-51D"),
1878
1879 { /* sentinal */ }
1880 };
1881
find_edp_panel(u32 panel_id)1882 static const struct edp_panel_entry *find_edp_panel(u32 panel_id)
1883 {
1884 const struct edp_panel_entry *panel;
1885
1886 if (!panel_id)
1887 return NULL;
1888
1889 for (panel = edp_panels; panel->panel_id; panel++)
1890 if (panel->panel_id == panel_id)
1891 return panel;
1892
1893 return NULL;
1894 }
1895
panel_edp_platform_probe(struct platform_device * pdev)1896 static int panel_edp_platform_probe(struct platform_device *pdev)
1897 {
1898 const struct of_device_id *id;
1899
1900 /* Skip one since "edp-panel" is only supported on DP AUX bus */
1901 id = of_match_node(platform_of_match + 1, pdev->dev.of_node);
1902 if (!id)
1903 return -ENODEV;
1904
1905 return panel_edp_probe(&pdev->dev, id->data, NULL);
1906 }
1907
panel_edp_platform_remove(struct platform_device * pdev)1908 static void panel_edp_platform_remove(struct platform_device *pdev)
1909 {
1910 panel_edp_remove(&pdev->dev);
1911 }
1912
panel_edp_platform_shutdown(struct platform_device * pdev)1913 static void panel_edp_platform_shutdown(struct platform_device *pdev)
1914 {
1915 panel_edp_shutdown(&pdev->dev);
1916 }
1917
1918 static const struct dev_pm_ops panel_edp_pm_ops = {
1919 SET_RUNTIME_PM_OPS(panel_edp_suspend, panel_edp_resume, NULL)
1920 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
1921 pm_runtime_force_resume)
1922 };
1923
1924 static struct platform_driver panel_edp_platform_driver = {
1925 .driver = {
1926 .name = "panel-edp",
1927 .of_match_table = platform_of_match,
1928 .pm = &panel_edp_pm_ops,
1929 },
1930 .probe = panel_edp_platform_probe,
1931 .remove_new = panel_edp_platform_remove,
1932 .shutdown = panel_edp_platform_shutdown,
1933 };
1934
panel_edp_dp_aux_ep_probe(struct dp_aux_ep_device * aux_ep)1935 static int panel_edp_dp_aux_ep_probe(struct dp_aux_ep_device *aux_ep)
1936 {
1937 const struct of_device_id *id;
1938
1939 id = of_match_node(platform_of_match, aux_ep->dev.of_node);
1940 if (!id)
1941 return -ENODEV;
1942
1943 return panel_edp_probe(&aux_ep->dev, id->data, aux_ep->aux);
1944 }
1945
panel_edp_dp_aux_ep_remove(struct dp_aux_ep_device * aux_ep)1946 static void panel_edp_dp_aux_ep_remove(struct dp_aux_ep_device *aux_ep)
1947 {
1948 panel_edp_remove(&aux_ep->dev);
1949 }
1950
panel_edp_dp_aux_ep_shutdown(struct dp_aux_ep_device * aux_ep)1951 static void panel_edp_dp_aux_ep_shutdown(struct dp_aux_ep_device *aux_ep)
1952 {
1953 panel_edp_shutdown(&aux_ep->dev);
1954 }
1955
1956 static struct dp_aux_ep_driver panel_edp_dp_aux_ep_driver = {
1957 .driver = {
1958 .name = "panel-simple-dp-aux",
1959 .of_match_table = platform_of_match, /* Same as platform one! */
1960 .pm = &panel_edp_pm_ops,
1961 },
1962 .probe = panel_edp_dp_aux_ep_probe,
1963 .remove = panel_edp_dp_aux_ep_remove,
1964 .shutdown = panel_edp_dp_aux_ep_shutdown,
1965 };
1966
panel_edp_init(void)1967 static int __init panel_edp_init(void)
1968 {
1969 int err;
1970
1971 err = platform_driver_register(&panel_edp_platform_driver);
1972 if (err < 0)
1973 return err;
1974
1975 err = dp_aux_dp_driver_register(&panel_edp_dp_aux_ep_driver);
1976 if (err < 0)
1977 goto err_did_platform_register;
1978
1979 return 0;
1980
1981 err_did_platform_register:
1982 platform_driver_unregister(&panel_edp_platform_driver);
1983
1984 return err;
1985 }
1986 module_init(panel_edp_init);
1987
panel_edp_exit(void)1988 static void __exit panel_edp_exit(void)
1989 {
1990 dp_aux_dp_driver_unregister(&panel_edp_dp_aux_ep_driver);
1991 platform_driver_unregister(&panel_edp_platform_driver);
1992 }
1993 module_exit(panel_edp_exit);
1994
1995 MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>");
1996 MODULE_DESCRIPTION("DRM Driver for Simple eDP Panels");
1997 MODULE_LICENSE("GPL and additional rights");
1998
