Searched refs:default_ctrl (Results 1 – 4 of 4) sorted by relevance
151 r->default_ctrl = max_cbm; in cache_alloc_hsw_probe()206 r->default_ctrl = MAX_MBA_BW; in __get_mem_config_intel()245 r->default_ctrl = MAX_MBA_BW_AMD; in __rdt_get_mem_config_amd()276 r->default_ctrl = BIT_MASK(eax.split.cbm_len + 1) - 1; in rdt_get_cache_alloc_cfg()277 r->cache.shareable_bits = ebx & r->default_ctrl; in rdt_get_cache_alloc_cfg()324 return r->default_ctrl; in delay_bw_map()430 *dc = r->default_ctrl; in setup_default_ctrlval()
49 if ((bw < r->membw.min_bw || bw > r->default_ctrl) && in bw_validate()52 r->membw.min_bw, r->default_ctrl); in bw_validate()108 if ((r->cache.min_cbm_bits > 0 && val == 0) || val > r->default_ctrl) { in cbm_validate()
874 seq_printf(seq, "%x\n", r->default_ctrl); in rdt_default_ctrl_show()2657 hw_dom->ctrl_val[i] = r->default_ctrl; in reset_all_ctrls()3126 cfg->new_ctrl = r->default_ctrl; in rdtgroup_init_mba()
177 u32 default_ctrl; member
