Searched refs:ddrclk (Results 1 – 4 of 4) sorted by relevance
| /Linux-v6.6/drivers/clk/rockchip/ |
| D | clk-ddr.c | 32 struct rockchip_ddrclk *ddrclk = to_rockchip_ddrclk_hw(hw); in rockchip_ddrclk_sip_set_rate() local
36 spin_lock_irqsave(ddrclk->lock, flags); in rockchip_ddrclk_sip_set_rate()
40 spin_unlock_irqrestore(ddrclk->lock, flags); in rockchip_ddrclk_sip_set_rate()
73 struct rockchip_ddrclk *ddrclk = to_rockchip_ddrclk_hw(hw); in rockchip_ddrclk_get_parent() local
76 val = readl(ddrclk->reg_base + in rockchip_ddrclk_get_parent()
77 ddrclk->mux_offset) >> ddrclk->mux_shift; in rockchip_ddrclk_get_parent()
78 val &= GENMASK(ddrclk->mux_width - 1, 0); in rockchip_ddrclk_get_parent()
98 struct rockchip_ddrclk *ddrclk; in rockchip_clk_register_ddrclk() local
102 ddrclk = kzalloc(sizeof(*ddrclk), GFP_KERNEL); in rockchip_clk_register_ddrclk()
103 if (!ddrclk) in rockchip_clk_register_ddrclk()
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| /Linux-v6.6/Documentation/devicetree/bindings/arm/marvell/ |
| D | kirkwood.txt | 12 cpus/cpu@0 with three clocks, "cpu_clk", "ddrclk" and "powersave",
14 between the "cpu_clk" and the "ddrclk".
26 clock-names = "cpu_clk", "ddrclk", "powersave";
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| /Linux-v6.6/Documentation/devicetree/bindings/clock/ |
| D | mvebu-core-clock.txt | 18 3 = ddrclk (DDR clock)
24 3 = ddrclk (DDR clock)
37 2 = ddrclk (DDR clock)
44 3 = ddrclk (DDR controller clock derived from CPU0 clock)
49 2 = ddrclk (DDR controller clock derived from CPU0 clock)
72 output names ("tclk", "cpuclk", "l2clk", "ddrclk")
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| /Linux-v6.6/arch/arm/boot/dts/marvell/ |
| D | kirkwood.dtsi | 22 clock-names = "cpu_clk", "ddrclk", "powersave";
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