Searched refs:dccg_dcn (Results 1 – 8 of 8) sorted by relevance
/Linux-v6.6/drivers/gpu/drm/amd/display/dc/dcn30/ |
D | dcn30_dccg.c | 34 (dccg_dcn->regs->reg) 38 dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name 41 dccg_dcn->base.ctx 61 struct dcn_dccg *dccg_dcn = kzalloc(sizeof(*dccg_dcn), GFP_KERNEL); in dccg3_create() local 64 if (dccg_dcn == NULL) { in dccg3_create() 69 base = &dccg_dcn->base; in dccg3_create() 73 dccg_dcn->regs = regs; in dccg3_create() 74 dccg_dcn->dccg_shift = dccg_shift; in dccg3_create() 75 dccg_dcn->dccg_mask = dccg_mask; in dccg3_create() 77 return &dccg_dcn->base; in dccg3_create() [all …]
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/Linux-v6.6/drivers/gpu/drm/amd/display/dc/dcn20/ |
D | dcn20_dccg.c | 36 (dccg_dcn->regs->reg) 40 dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name 43 dccg_dcn->base.ctx 49 struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg); in dccg2_update_dpp_dto() local 81 struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg); in dccg2_get_dccg_ref_freq() local 102 struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg); in dccg2_set_fifo_errdet_ovr_en() local 111 struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg); in dccg2_otg_add_pixel() local 123 struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg); in dccg2_otg_drop_pixel() local 151 struct dcn_dccg *dccg_dcn = kzalloc(sizeof(*dccg_dcn), GFP_ATOMIC); in dccg2_create() local 154 if (dccg_dcn == NULL) { in dccg2_create() [all …]
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/Linux-v6.6/drivers/gpu/drm/amd/display/dc/dcn301/ |
D | dcn301_dccg.c | 34 (dccg_dcn->regs->reg) 38 dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name 41 dccg_dcn->base.ctx 60 struct dcn_dccg *dccg_dcn = kzalloc(sizeof(*dccg_dcn), GFP_KERNEL); in dccg301_create() local 63 if (dccg_dcn == NULL) { in dccg301_create() 68 base = &dccg_dcn->base; in dccg301_create() 72 dccg_dcn->regs = regs; in dccg301_create() 73 dccg_dcn->dccg_shift = dccg_shift; in dccg301_create() 74 dccg_dcn->dccg_mask = dccg_mask; in dccg301_create() 76 return &dccg_dcn->base; in dccg301_create()
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/Linux-v6.6/drivers/gpu/drm/amd/display/dc/dcn201/ |
D | dcn201_dccg.c | 35 (dccg_dcn->regs->reg) 39 dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name 42 dccg_dcn->base.ctx 68 struct dcn_dccg *dccg_dcn = kzalloc(sizeof(*dccg_dcn), GFP_KERNEL); in dccg201_create() local 71 if (dccg_dcn == NULL) { in dccg201_create() 76 base = &dccg_dcn->base; in dccg201_create() 80 dccg_dcn->regs = regs; in dccg201_create() 81 dccg_dcn->dccg_shift = dccg_shift; in dccg201_create() 82 dccg_dcn->dccg_mask = dccg_mask; in dccg201_create() 84 return &dccg_dcn->base; in dccg201_create()
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/Linux-v6.6/drivers/gpu/drm/amd/display/dc/dcn21/ |
D | dcn21_dccg.c | 35 (dccg_dcn->regs->reg) 39 dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name 42 dccg_dcn->base.ctx 48 struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg); in dccg21_update_dpp_dto() local 115 struct dcn_dccg *dccg_dcn = kzalloc(sizeof(*dccg_dcn), GFP_KERNEL); in dccg21_create() local 118 if (dccg_dcn == NULL) { in dccg21_create() 123 base = &dccg_dcn->base; in dccg21_create() 127 dccg_dcn->regs = regs; in dccg21_create() 128 dccg_dcn->dccg_shift = dccg_shift; in dccg21_create() 129 dccg_dcn->dccg_mask = dccg_mask; in dccg21_create() [all …]
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/Linux-v6.6/drivers/gpu/drm/amd/display/dc/dcn32/ |
D | dcn32_dccg.c | 34 (dccg_dcn->regs->reg) 38 dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name 41 dccg_dcn->base.ctx 48 struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg); in dccg32_trigger_dio_fifo_resync() local 64 struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg); in dccg32_get_pixel_rate_div() local 106 struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg); in dccg32_set_pixel_rate_div() local 153 struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg); in dccg32_set_dtbclk_p_src() local 208 struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg); in dccg32_set_dtbclk_dto() local 281 struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg); in dccg32_set_dpstreamclk() local 315 struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg); in dccg32_otg_add_pixel() local [all …]
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/Linux-v6.6/drivers/gpu/drm/amd/display/dc/dcn31/ |
D | dcn31_dccg.c | 35 (dccg_dcn->regs->reg) 39 dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name 42 dccg_dcn->base.ctx 48 struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg); in dccg31_update_dpp_dto() local 84 struct dcn_dccg *dccg_dcn, in get_phy_mux_symclk() argument 87 if (dccg_dcn->base.ctx->asic_id.chip_family == FAMILY_YELLOW_CARP && in get_phy_mux_symclk() 88 dccg_dcn->base.ctx->asic_id.hw_internal_rev == YELLOW_CARP_B0) { in get_phy_mux_symclk() 99 struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg); in dccg31_enable_dpstreamclk() local 131 struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg); in dccg31_disable_dpstreamclk() local 178 struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg); in dccg31_enable_symclk32_se() local [all …]
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/Linux-v6.6/drivers/gpu/drm/amd/display/dc/dcn314/ |
D | dcn314_dccg.c | 37 (dccg_dcn->regs->reg) 41 dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name 44 dccg_dcn->base.ctx 51 struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg); in dccg314_trigger_dio_fifo_resync() local 64 struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg); in dccg314_get_pixel_rate_div() local 106 struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg); in dccg314_set_pixel_rate_div() local 152 struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg); in dccg314_set_dtbclk_p_src() local 208 struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg); in dccg314_set_dtbclk_dto() local 254 struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg); in dccg314_set_dpstreamclk() local 333 struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg); in dccg314_dpp_root_clock_control() local [all …]
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