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/Linux-v6.6/arch/riscv/kernel/
Dtraps_misaligned.c234 ulong data_ulong; member
314 SET_RD(insn, regs, val.data_ulong << shift >> shift); in handle_misaligned_load()
331 val.data_ulong = GET_RS2(insn, regs); in handle_misaligned_store()
344 val.data_ulong = GET_RS2S(insn, regs); in handle_misaligned_store()
348 val.data_ulong = GET_RS2C(insn, regs); in handle_misaligned_store()
352 val.data_ulong = GET_RS2S(insn, regs); in handle_misaligned_store()
356 val.data_ulong = GET_RS2C(insn, regs); in handle_misaligned_store()