Searched refs:ctrl_seg (Results 1 – 3 of 3) sorted by relevance
295 err = umr_check_mkey_mask(dev, be64_to_cpu(wqe->ctrl_seg.mkey_mask)); in mlx5r_umr_post_send_wait()366 wqe.ctrl_seg.mkey_mask |= get_umr_update_pd_mask(); in mlx5r_umr_revoke_mr()367 wqe.ctrl_seg.mkey_mask |= get_umr_disable_mr_mask(); in mlx5r_umr_revoke_mr()368 wqe.ctrl_seg.flags |= MLX5_UMR_INLINE; in mlx5r_umr_revoke_mr()404 wqe.ctrl_seg.mkey_mask = get_umr_update_access_mask(dev); in mlx5r_umr_rereg_pd_access()405 wqe.ctrl_seg.mkey_mask |= get_umr_update_pd_mask(); in mlx5r_umr_rereg_pd_access()406 wqe.ctrl_seg.flags = MLX5_UMR_CHECK_FREE; in mlx5r_umr_rereg_pd_access()407 wqe.ctrl_seg.flags |= MLX5_UMR_INLINE; in mlx5r_umr_rereg_pd_access()527 mlx5r_umr_set_update_xlt_ctrl_seg(struct mlx5_wqe_umr_ctrl_seg *ctrl_seg, in mlx5r_umr_set_update_xlt_ctrl_seg() argument532 ctrl_seg->flags = MLX5_UMR_CHECK_FREE; in mlx5r_umr_set_update_xlt_ctrl_seg()[all …]
86 struct mlx5_wqe_umr_ctrl_seg ctrl_seg; member
1148 struct v4l2_av1_segmentation *ctrl_seg) in vdec_av1_slice_setup_seg() argument1152 seg->segmentation_enabled = SEGMENTATION_FLAG(ctrl_seg, ENABLED); in vdec_av1_slice_setup_seg()1153 seg->segmentation_update_map = SEGMENTATION_FLAG(ctrl_seg, UPDATE_MAP); in vdec_av1_slice_setup_seg()1154 seg->segmentation_temporal_update = SEGMENTATION_FLAG(ctrl_seg, TEMPORAL_UPDATE); in vdec_av1_slice_setup_seg()1155 seg->segmentation_update_data = SEGMENTATION_FLAG(ctrl_seg, UPDATE_DATA); in vdec_av1_slice_setup_seg()1156 seg->segid_preskip = SEGMENTATION_FLAG(ctrl_seg, SEG_ID_PRE_SKIP); in vdec_av1_slice_setup_seg()1157 seg->last_active_segid = ctrl_seg->last_active_seg_id; in vdec_av1_slice_setup_seg()1160 seg->feature_enabled_mask[i] = ctrl_seg->feature_enabled[i]; in vdec_av1_slice_setup_seg()1162 seg->feature_data[i][j] = ctrl_seg->feature_data[i][j]; in vdec_av1_slice_setup_seg()
