/Linux-v6.6/drivers/mmc/host/ |
D | dw_mmc-exynos.c | 143 u32 clksel; in dw_mci_exynos_set_clksel_timing() local 148 clksel = mci_readl(host, CLKSEL64); in dw_mci_exynos_set_clksel_timing() 150 clksel = mci_readl(host, CLKSEL); in dw_mci_exynos_set_clksel_timing() 152 clksel = (clksel & ~SDMMC_CLKSEL_TIMING_MASK) | timing; in dw_mci_exynos_set_clksel_timing() 157 mci_writel(host, CLKSEL64, clksel); in dw_mci_exynos_set_clksel_timing() 159 mci_writel(host, CLKSEL, clksel); in dw_mci_exynos_set_clksel_timing() 168 if (!SDMMC_CLKSEL_GET_DRV_WD3(clksel) && host->slot) in dw_mci_exynos_set_clksel_timing() 217 u32 clksel; in dw_mci_exynos_resume_noirq() local 227 clksel = mci_readl(host, CLKSEL64); in dw_mci_exynos_resume_noirq() 229 clksel = mci_readl(host, CLKSEL); in dw_mci_exynos_resume_noirq() [all …]
|
/Linux-v6.6/drivers/clk/rockchip/ |
D | clk-cpu.c | 105 const struct rockchip_cpuclk_clksel *clksel = &rate->divs[i]; in rockchip_cpuclk_set_dividers() local 107 if (!clksel->reg) in rockchip_cpuclk_set_dividers() 111 __func__, clksel->reg, clksel->val); in rockchip_cpuclk_set_dividers() 112 writel(clksel->val, cpuclk->reg_base + clksel->reg); in rockchip_cpuclk_set_dividers() 123 const struct rockchip_cpuclk_clksel *clksel = &rate->pre_muxs[i]; in rockchip_cpuclk_set_pre_muxs() local 125 if (!clksel->reg) in rockchip_cpuclk_set_pre_muxs() 129 __func__, clksel->reg, clksel->val); in rockchip_cpuclk_set_pre_muxs() 130 writel(clksel->val, cpuclk->reg_base + clksel->reg); in rockchip_cpuclk_set_pre_muxs() 141 const struct rockchip_cpuclk_clksel *clksel = &rate->post_muxs[i]; in rockchip_cpuclk_set_post_muxs() local 143 if (!clksel->reg) in rockchip_cpuclk_set_post_muxs() [all …]
|
/Linux-v6.6/drivers/clocksource/ |
D | timer-cadence-ttc.c | 476 int clksel, ret; in ttc_timer_probe() local 504 clksel = readl_relaxed(timer_baseaddr + TTC_CLK_CNTRL_OFFSET); in ttc_timer_probe() 505 clksel = !!(clksel & TTC_CLK_CNTRL_CSRC_MASK); in ttc_timer_probe() 506 clk_cs = of_clk_get(timer, clksel); in ttc_timer_probe() 512 clksel = readl_relaxed(timer_baseaddr + 4 + TTC_CLK_CNTRL_OFFSET); in ttc_timer_probe() 513 clksel = !!(clksel & TTC_CLK_CNTRL_CSRC_MASK); in ttc_timer_probe() 514 clk_ce = of_clk_get(timer, clksel); in ttc_timer_probe()
|
/Linux-v6.6/arch/arm/boot/dts/ti/omap/ |
D | omap36xx-omap3430es2plus-clocks.dtsi | 9 compatible = "ti,clksel"; 24 compatible = "ti,clksel"; 54 compatible = "ti,clksel"; 85 compatible = "ti,clksel"; 172 compatible = "ti,clksel"; 194 compatible = "ti,clksel";
|
D | omap34xx-omap36xx-clocks.dtsi | 17 compatible = "ti,clksel"; 65 compatible = "ti,clksel"; 105 compatible = "ti,clksel"; 160 compatible = "ti,clksel"; 228 compatible = "ti,clksel"; 252 compatible = "ti,clksel";
|
D | omap3430es1-clocks.dtsi | 50 compatible = "ti,clksel"; 81 compatible = "ti,clksel"; 121 compatible = "ti,clksel"; 174 compatible = "ti,clksel";
|
D | omap36xx-am35xx-omap3430es2plus-clocks.dtsi | 138 compatible = "ti,clksel"; 153 compatible = "ti,clksel"; 168 compatible = "ti,clksel"; 183 compatible = "ti,clksel";
|
D | am35xx-clocks.dtsi | 66 compatible = "ti,clksel"; 101 compatible = "ti,clksel";
|
D | omap3xxx-clocks.dtsi | 83 compatible = "ti,clksel"; 120 compatible = "ti,clksel"; 259 compatible = "ti,clksel"; 429 compatible = "ti,clksel"; 471 compatible = "ti,clksel"; 603 compatible = "ti,clksel"; 666 compatible = "ti,clksel"; 709 compatible = "ti,clksel"; 734 compatible = "ti,clksel"; 914 compatible = "ti,clksel"; [all …]
|
D | omap36xx-clocks.dtsi | 62 compatible = "ti,clksel";
|
D | am33xx-clocks.dtsi | 108 compatible = "ti,clksel"; 566 compatible = "ti,clksel"; 571 gfx_fclk_clksel_ck: clock-gfx-fclk-clksel { 589 compatible = "ti,clksel";
|
D | am43xx-clocks.dtsi | 572 dpll_clksel_mac_clk: clock-dpll-clksel-mac-2@4234 { 606 gfx_fclk_clksel_ck: clock-gfx-fclk-clksel-1@423c {
|
/Linux-v6.6/arch/arm/mach-imx/ |
D | mach-imx6q.c | 85 u32 clksel; in imx6q_1588_init() local 118 clksel = clk_is_match(ptp_clk, enet_ref) ? in imx6q_1588_init() 125 clksel); in imx6q_1588_init()
|
/Linux-v6.6/drivers/clk/ |
D | clk-qoriq.c | 59 struct clockgen_sourceinfo clksel[NUM_MUX_PARENTS]; member 852 u32 clksel; in mux_set_parent() local 857 clksel = hwc->parent_to_clksel[idx]; in mux_set_parent() 858 cg_out(hwc->cg, (clksel << CLKSEL_SHIFT) & CLKSEL_MASK, hwc->reg); in mux_set_parent() 866 u32 clksel; in mux_get_parent() local 869 clksel = (cg_in(hwc->cg, hwc->reg) & CLKSEL_MASK) >> CLKSEL_SHIFT; in mux_get_parent() 871 ret = hwc->clksel_to_parent[clksel]; in mux_get_parent() 900 if (!(hwc->info->clksel[idx].flags & CLKSEL_VALID)) in get_pll_div() 903 pll = hwc->info->clksel[idx].pll; in get_pll_div() 904 div = hwc->info->clksel[idx].div; in get_pll_div() [all …]
|
/Linux-v6.6/drivers/gpu/drm/renesas/rcar-du/ |
D | rcar_lvds.c | 138 u32 clksel; member 143 u32 clksel, bool dot_clock_only) in rcar_lvds_d3_e3_pll_calc() argument 251 pll->clksel = clksel; in rcar_lvds_d3_e3_pll_calc() 285 lvdpllcr = LVDPLLCR_PLLON | pll.clksel | LVDPLLCR_CLKOUT in rcar_lvds_pll_setup_d3_e3()
|