Searched refs:clkreg (Results 1 – 4 of 4) sorted by relevance
147 u8 clkreg; in ftide010_set_dmamode() local160 clkreg = readb(ftide->base + FTIDE010_CLK_MOD); in ftide010_set_dmamode()161 clkreg &= ~udma_en_mask; in ftide010_set_dmamode()162 clkreg &= ~f66m_en_mask; in ftide010_set_dmamode()169 clkreg |= udma_en_mask; in ftide010_set_dmamode()171 clkreg |= f66m_en_mask; in ftide010_set_dmamode()184 clkreg, timreg); in ftide010_set_dmamode()186 writeb(clkreg, ftide->base + FTIDE010_CLK_MOD); in ftide010_set_dmamode()194 clkreg |= f66m_en_mask; in ftide010_set_dmamode()203 clkreg, timreg); in ftide010_set_dmamode()[all …]
139 .clkreg = MCI_CLK_ENABLE,165 .clkreg = MCI_CLK_ENABLE,199 .clkreg = MCI_CLK_ENABLE,234 .clkreg = MCI_CLK_ENABLE,341 .clkreg = MCI_CLK_ENABLE,438 u32 clk = variant->clkreg; in mmci_set_clkreg()
337 unsigned int clkreg; member
7981 u32 clkreg; in bnx2_get_pci_speed() local7985 clkreg = BNX2_RD(bp, BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS); in bnx2_get_pci_speed()7987 clkreg &= BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET; in bnx2_get_pci_speed()7988 switch (clkreg) { in bnx2_get_pci_speed()
