| /Linux-v6.6/drivers/clk/meson/ |
| D | axg-audio.c | 327 static struct clk_regmap ddr_arb =
329 static struct clk_regmap pdm =
331 static struct clk_regmap tdmin_a =
333 static struct clk_regmap tdmin_b =
335 static struct clk_regmap tdmin_c =
337 static struct clk_regmap tdmin_lb =
339 static struct clk_regmap tdmout_a =
341 static struct clk_regmap tdmout_b =
343 static struct clk_regmap tdmout_c =
345 static struct clk_regmap frddr_a =
[all …]
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| D | a1-peripherals.c | 20 static struct clk_regmap xtal_in = {
35 static struct clk_regmap fixpll_in = {
50 static struct clk_regmap usb_phy_in = {
65 static struct clk_regmap usb_ctrl_in = {
80 static struct clk_regmap hifipll_in = {
95 static struct clk_regmap syspll_in = {
110 static struct clk_regmap dds_in = {
125 static struct clk_regmap rtc_32k_in = {
151 static struct clk_regmap rtc_32k_div = {
190 static struct clk_regmap rtc_32k_xtal = {
[all …]
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| D | axg.c | 28 static struct clk_regmap axg_fixed_pll_dco = {
71 static struct clk_regmap axg_fixed_pll = {
92 static struct clk_regmap axg_sys_pll_dco = {
130 static struct clk_regmap axg_sys_pll = {
189 static struct clk_regmap axg_gp0_pll_dco = {
235 static struct clk_regmap axg_gp0_pll = {
261 static struct clk_regmap axg_hifi_pll_dco = {
308 static struct clk_regmap axg_hifi_pll = {
337 static struct clk_regmap axg_fclk_div2 = {
364 static struct clk_regmap axg_fclk_div3 = {
[all …]
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| D | gxbb.c | 88 static struct clk_regmap gxbb_fixed_pll_dco = {
131 static struct clk_regmap gxbb_fixed_pll = {
165 static struct clk_regmap gxbb_hdmi_pll_dco = {
213 static struct clk_regmap gxl_hdmi_pll_dco = {
267 static struct clk_regmap gxbb_hdmi_pll_od = {
285 static struct clk_regmap gxbb_hdmi_pll_od2 = {
303 static struct clk_regmap gxbb_hdmi_pll = {
321 static struct clk_regmap gxl_hdmi_pll_od = {
339 static struct clk_regmap gxl_hdmi_pll_od2 = {
357 static struct clk_regmap gxl_hdmi_pll = {
[all …]
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| D | g12a.c | 32 static struct clk_regmap g12a_fixed_pll_dco = {
75 static struct clk_regmap g12a_fixed_pll = {
101 static struct clk_regmap g12a_sys_pll_dco = {
142 static struct clk_regmap g12a_sys_pll = {
160 static struct clk_regmap g12b_sys1_pll_dco = {
201 static struct clk_regmap g12b_sys1_pll = {
219 static struct clk_regmap g12a_sys_pll_div16_en = {
236 static struct clk_regmap g12b_sys1_pll_div16_en = {
292 static struct clk_regmap g12a_fclk_div2 = {
329 static struct clk_regmap g12a_fclk_div3 = {
[all …]
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| D | clk-phase.c | 16 meson_clk_phase_data(struct clk_regmap *clk) in meson_clk_phase_data()
39 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_phase_get_phase()
50 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_phase_set_phase()
76 meson_clk_triphase_data(struct clk_regmap *clk) in meson_clk_triphase_data()
83 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_triphase_sync()
97 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_triphase_get_phase()
109 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_triphase_set_phase()
135 meson_sclk_ws_inv_data(struct clk_regmap *clk) in meson_sclk_ws_inv_data()
142 struct clk_regmap *clk = to_clk_regmap(hw); in meson_sclk_ws_inv_sync()
155 struct clk_regmap *clk = to_clk_regmap(hw); in meson_sclk_ws_inv_get_phase()
[all …]
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| D | g12a-aoclk.c | 47 static struct clk_regmap g12a_aoclk_##_name = { \
79 static struct clk_regmap g12a_aoclk_cts_oscin = {
106 static struct clk_regmap g12a_aoclk_32k_by_oscin_pre = {
121 static struct clk_regmap g12a_aoclk_32k_by_oscin_div = {
160 static struct clk_regmap g12a_aoclk_32k_by_oscin_sel = {
179 static struct clk_regmap g12a_aoclk_32k_by_oscin = {
197 static struct clk_regmap g12a_aoclk_cec_pre = {
212 static struct clk_regmap g12a_aoclk_cec_div = {
251 static struct clk_regmap g12a_aoclk_cec_sel = {
270 static struct clk_regmap g12a_aoclk_cec = {
[all …]
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| D | clk-regmap.h | 23 struct clk_regmap { struct
29 static inline struct clk_regmap *to_clk_regmap(struct clk_hw *hw) in to_clk_regmap() argument
31 return container_of(hw, struct clk_regmap, hw); in to_clk_regmap()
51 clk_get_regmap_gate_data(struct clk_regmap *clk) in clk_get_regmap_gate_data()
79 clk_get_regmap_div_data(struct clk_regmap *clk) in clk_get_regmap_div_data()
109 clk_get_regmap_mux_data(struct clk_regmap *clk) in clk_get_regmap_mux_data()
118 struct clk_regmap _name = { \
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| D | meson8b.c | 59 static struct clk_regmap meson8b_fixed_pll_dco = {
104 static struct clk_regmap meson8b_fixed_pll = {
175 static struct clk_regmap meson8b_hdmi_pll_dco = {
222 static struct clk_regmap meson8b_hdmi_pll_lvds_out = {
240 static struct clk_regmap meson8b_hdmi_pll_hdmi_out = {
258 static struct clk_regmap meson8b_sys_pll_dco = {
299 static struct clk_regmap meson8b_sys_pll = {
330 static struct clk_regmap meson8b_fclk_div2 = {
358 static struct clk_regmap meson8b_fclk_div3 = {
386 static struct clk_regmap meson8b_fclk_div4 = {
[all …]
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| D | axg-aoclk.c | 38 static struct clk_regmap axg_aoclk_##_name = { \
62 static struct clk_regmap axg_aoclk_cts_oscin = {
77 static struct clk_regmap axg_aoclk_32k_pre = {
102 static struct clk_regmap axg_aoclk_32k_div = {
141 static struct clk_regmap axg_aoclk_32k_sel = {
160 static struct clk_regmap axg_aoclk_32k = {
176 static struct clk_regmap axg_aoclk_cts_rtc_oscin = {
195 static struct clk_regmap axg_aoclk_clk81 = {
214 static struct clk_regmap axg_aoclk_saradc_mux = {
231 static struct clk_regmap axg_aoclk_saradc_div = {
[all …]
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| D | sclk-div.c | 26 meson_sclk_div_data(struct clk_regmap *clk) in meson_sclk_div_data()
102 struct clk_regmap *clk = to_clk_regmap(hw); in sclk_div_determine_rate()
112 static void sclk_apply_ratio(struct clk_regmap *clk, in sclk_apply_ratio()
128 struct clk_regmap *clk = to_clk_regmap(hw); in sclk_div_set_duty_cycle()
142 struct clk_regmap *clk = to_clk_regmap(hw); in sclk_div_get_duty_cycle()
158 static void sclk_apply_divider(struct clk_regmap *clk, in sclk_apply_divider()
170 struct clk_regmap *clk = to_clk_regmap(hw); in sclk_div_set_rate()
185 struct clk_regmap *clk = to_clk_regmap(hw); in sclk_div_recalc_rate()
193 struct clk_regmap *clk = to_clk_regmap(hw); in sclk_div_enable()
203 struct clk_regmap *clk = to_clk_regmap(hw); in sclk_div_disable()
[all …]
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| D | gxbb-aoclk.c | 27 static struct clk_regmap _name##_ao = { \
50 static struct clk_regmap ao_cts_oscin = {
65 static struct clk_regmap ao_32k_pre = {
88 static struct clk_regmap ao_32k_div = {
125 static struct clk_regmap ao_32k_sel = {
144 static struct clk_regmap ao_32k = {
158 static struct clk_regmap ao_cts_rtc_oscin = {
180 static struct clk_regmap ao_clk81 = {
199 static struct clk_regmap ao_cts_cec = {
240 static struct clk_regmap *gxbb_aoclk[] = {
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| D | clk-regmap.c | 12 struct clk_regmap *clk = to_clk_regmap(hw); in clk_regmap_gate_endisable()
34 struct clk_regmap *clk = to_clk_regmap(hw); in clk_regmap_gate_is_enabled()
62 struct clk_regmap *clk = to_clk_regmap(hw); in clk_regmap_div_recalc_rate()
81 struct clk_regmap *clk = to_clk_regmap(hw); in clk_regmap_div_determine_rate()
106 struct clk_regmap *clk = to_clk_regmap(hw); in clk_regmap_div_set_rate()
138 struct clk_regmap *clk = to_clk_regmap(hw); in clk_regmap_mux_get_parent()
154 struct clk_regmap *clk = to_clk_regmap(hw); in clk_regmap_mux_set_parent()
166 struct clk_regmap *clk = to_clk_regmap(hw); in clk_regmap_mux_determine_rate()
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| D | a1-pll.c | 19 static struct clk_regmap fixed_pll_dco = {
62 static struct clk_regmap fixed_pll = {
90 static struct clk_regmap hifi_pll = {
154 static struct clk_regmap fclk_div2 = {
192 static struct clk_regmap fclk_div3 = {
225 static struct clk_regmap fclk_div5 = {
258 static struct clk_regmap fclk_div7 = {
288 static struct clk_regmap *const a1_pll_regmaps[] = {
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| D | clk-cpu-dyndiv.c | 14 meson_clk_cpu_dyndiv_data(struct clk_regmap *clk) in meson_clk_cpu_dyndiv_data()
22 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_cpu_dyndiv_recalc_rate()
33 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_cpu_dyndiv_determine_rate()
42 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_cpu_dyndiv_set_rate()
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| D | clk-mpll.c | 26 meson_clk_mpll_data(struct clk_regmap *clk) in meson_clk_mpll_data()
78 struct clk_regmap *clk = to_clk_regmap(hw); in mpll_recalc_rate()
92 struct clk_regmap *clk = to_clk_regmap(hw); in mpll_determine_rate()
112 struct clk_regmap *clk = to_clk_regmap(hw); in mpll_set_rate()
140 struct clk_regmap *clk = to_clk_regmap(hw); in mpll_init()
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| D | clk-pll.c | 40 meson_clk_pll_data(struct clk_regmap *clk) in meson_clk_pll_data()
74 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_pll_recalc_rate()
247 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_pll_determine_rate()
277 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_pll_wait_lock()
294 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_pll_init()
313 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_pll_is_enabled()
343 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_pll_enable()
388 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_pll_disable()
406 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_pll_set_rate()
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| D | clk-dualdiv.c | 31 meson_clk_dualdiv_data(struct clk_regmap *clk) in meson_clk_dualdiv_data()
50 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_dualdiv_recalc_rate()
92 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_dualdiv_determine_rate()
111 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_dualdiv_set_rate()
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| D | meson8-ddr.c | 25 static struct clk_regmap meson8_ddr_pll_dco = {
63 static struct clk_regmap meson8_ddr_pll = {
88 static struct clk_regmap *const meson8_ddr_clk_regmaps[] = {
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| /Linux-v6.6/drivers/clk/qcom/ |
| D | clk-regmap.h | 20 struct clk_regmap { struct
28 static inline struct clk_regmap *to_clk_regmap(struct clk_hw *hw) in to_clk_regmap() argument
30 return container_of(hw, struct clk_regmap, hw); in to_clk_regmap()
36 int devm_clk_register_regmap(struct device *dev, struct clk_regmap *rclk);
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| D | clk-regmap-phy-mux.c | 18 static inline struct clk_regmap_phy_mux *to_clk_regmap_phy_mux(struct clk_regmap *clkr) in to_clk_regmap_phy_mux()
25 struct clk_regmap *clkr = to_clk_regmap(hw); in phy_mux_is_enabled()
39 struct clk_regmap *clkr = to_clk_regmap(hw); in phy_mux_enable()
49 struct clk_regmap *clkr = to_clk_regmap(hw); in phy_mux_disable()
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| D | clk-regmap.c | 24 struct clk_regmap *rclk = to_clk_regmap(hw); in clk_is_enabled_regmap()
50 struct clk_regmap *rclk = to_clk_regmap(hw); in clk_enable_regmap()
74 struct clk_regmap *rclk = to_clk_regmap(hw); in clk_disable_regmap()
97 int devm_clk_register_regmap(struct device *dev, struct clk_regmap *rclk) in devm_clk_register_regmap()
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| D | clk-regmap-divider.c | 22 struct clk_regmap *clkr = ÷r->clkr; in div_round_ro_rate()
46 struct clk_regmap *clkr = ÷r->clkr; in div_set_rate()
61 struct clk_regmap *clkr = ÷r->clkr; in div_recalc_rate()
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| D | clk-rcg.h | 85 struct clk_regmap clkr;
124 struct clk_regmap clkr;
153 struct clk_regmap clkr;
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| /Linux-v6.6/drivers/clk/nxp/ |
| D | clk-lpc32xx.c | 74 static struct regmap *clk_regmap; variable
393 regmap_read(clk_regmap, clk->reg, &val); in clk_mask_enable()
398 return regmap_update_bits(clk_regmap, clk->reg, in clk_mask_enable()
406 regmap_update_bits(clk_regmap, clk->reg, in clk_mask_disable()
415 regmap_read(clk_regmap, clk->reg, &val); in clk_mask_is_enabled()
431 regmap_update_bits(clk_regmap, clk->reg, clk->enable, clk->enable); in clk_pll_enable()
434 regmap_read(clk_regmap, clk->reg, &val); in clk_pll_enable()
449 regmap_update_bits(clk_regmap, clk->reg, clk->enable, 0x0); in clk_pll_disable()
457 regmap_read(clk_regmap, clk->reg, &val); in clk_pll_is_enabled()
480 regmap_read(clk_regmap, clk->reg, &val); in clk_pll_recalc_rate()
[all …]
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