Home
last modified time | relevance | path

Searched refs:cfgPSWUSCFG0_1_PCIE_LANE_3_EQUALIZATION_CNTL (Results 1 – 2 of 2) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/nbio/
Dnbio_2_3_offset.h10265 #define cfgPSWUSCFG0_1_PCIE_LANE_3_EQUALIZATION_CNTL … macro
Dnbio_4_3_0_offset.h15080 #define cfgPSWUSCFG0_1_PCIE_LANE_3_EQUALIZATION_CNTL … macro