/Linux-v6.6/tools/cgroup/ |
D | memcg_slabinfo.py | 184 caches = {} 203 caches[addr] = cache 215 for addr in caches: 217 cache_show(caches[addr], cfg, stats[addr])
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/Linux-v6.6/Documentation/block/ |
D | writeback_cache_control.rst | 9 write back caches. That means the devices signal I/O completion to the 60 devices with volatile caches need to implement the support for these 67 For devices that do not support volatile write caches there is no driver 70 requests that have a payload. For devices with volatile write caches the 71 driver needs to tell the block layer that it supports flushing caches by
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/Linux-v6.6/kernel/bpf/ |
D | memalloc.c | 593 ma->caches = pcc; in bpf_mem_alloc_init() 645 if (ma->caches) { in check_leaked_objs() 647 cc = per_cpu_ptr(ma->caches, cpu); in check_leaked_objs() 660 free_percpu(ma->caches); in free_mem_alloc_no_barrier() 662 ma->caches = NULL; in free_mem_alloc_no_barrier() 738 if (ma->caches) { in bpf_mem_alloc_destroy() 741 cc = per_cpu_ptr(ma->caches, cpu); in bpf_mem_alloc_destroy() 869 ret = unit_alloc(this_cpu_ptr(ma->caches)->cache + idx); in bpf_mem_alloc() 884 unit_free(this_cpu_ptr(ma->caches)->cache + idx, ptr); in bpf_mem_free() 898 unit_free_rcu(this_cpu_ptr(ma->caches)->cache + idx, ptr); in bpf_mem_free_rcu()
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/Linux-v6.6/Documentation/filesystems/ |
D | 9p.rst | 80 cache=mode specifies a caching policy. By default, no caches are used. 86 0b00000000 all caches disabled, mmap disabled 87 0b00000001 file caches enabled 88 0b00000010 meta-data caches enabled 90 0b00001000 loose caches (no explicit consistency with server) 100 loose 0b00001111 (non-coherent file and meta-data caches) 108 IMPORTANT: loose caches (and by extension at the moment fscache) 184 /sys/fs/9p/caches. (applies only to cache=fscache)
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/Linux-v6.6/arch/arm/boot/compressed/ |
D | head-xscale.S | 28 mcr p15, 0, r0, c7, c7, 0 @ flush I & D caches 30 @ disabling MMU and caches
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D | head-sa1100.S | 38 mcr p15, 0, r0, c7, c7, 0 @ flush I & D caches 40 @ disabling MMU and caches
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/Linux-v6.6/arch/arm/mm/ |
D | proc-arm720.S | 46 mcr p15, 0, r0, c1, c0, 0 @ disable caches 108 mcr p15, 0, r0, c7, c7, 0 @ invalidate caches 136 mcr p15, 0, r0, c7, c7, 0 @ invalidate caches
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D | proc-sa110.S | 49 mcr p15, 0, r0, c1, c0, 0 @ disable caches 65 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 162 mcr p15, 0, r10, c7, c7 @ invalidate I,D caches on v4
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D | proc-fa526.S | 39 mcr p15, 0, r0, c1, c0, 0 @ disable caches 58 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 137 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
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D | proc-arm926.S | 53 mcr p15, 0, r0, c1, c0, 0 @ disable caches 69 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 404 mcr p15, 0, ip, c7, c7, 0 @ invalidate I+D caches 417 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 425 mov r0, #4 @ disable write-back on caches explicitly
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D | proc-sa1100.S | 57 mcr p15, 0, r0, c1, c0, 0 @ disable caches 73 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 201 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
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D | proc-arm920.S | 61 mcr p15, 0, r0, c1, c0, 0 @ disable caches 77 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 389 mcr p15, 0, ip, c7, c7, 0 @ invalidate I+D caches 402 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
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D | proc-mohawk.S | 44 mcr p15, 0, r0, c1, c0, 0 @ disable caches 62 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 359 mcr p15, 0, ip, c7, c7, 0 @ invalidate I & D caches, BTB 378 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches
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D | proc-arm740.S | 40 mcr p15, 0, r0, c1, c0, 0 @ disable caches 62 mcr p15, 0, r0, c7, c0, 0 @ invalidate caches
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D | proc-arm925.S | 84 mcr p15, 0, r0, c1, c0, 0 @ disable caches 109 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 436 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 443 mov r0, #4 @ disable write-back on caches explicitly
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D | proc-arm1020e.S | 69 mcr p15, 0, r0, c1, c0, 0 @ disable caches 85 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 415 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
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D | proc-arm1022.S | 69 mcr p15, 0, r0, c1, c0, 0 @ disable caches 85 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 408 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
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D | proc-arm1026.S | 69 mcr p15, 0, r0, c1, c0, 0 @ disable caches 85 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 397 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
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D | proc-arm922.S | 63 mcr p15, 0, r0, c1, c0, 0 @ disable caches 79 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 380 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
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D | proc-xsc3.S | 92 mcr p15, 0, r0, c1, c0, 0 @ disable caches 113 mcr p15, 0, ip, c7, c7, 0 @ invalidate L1 caches and BTB 430 mcr p15, 0, ip, c7, c7, 0 @ invalidate I & D caches, BTB 450 mcr p15, 0, ip, c7, c7, 0 @ invalidate L1 caches and BTB
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/Linux-v6.6/tools/perf/ |
D | builtin-stat.c | 1341 struct cpu_cache_level caches[MAX_CACHE_LVL]; in cpu__get_cache_details() local 1347 ret = build_caches_for_cpu(cpu.cpu, caches, &caches_cnt); in cpu__get_cache_details() 1371 if (caches[i].level > caches[max_level_index].level) in cpu__get_cache_details() 1375 cache->cache_lvl = caches[max_level_index].level; in cpu__get_cache_details() 1376 cache->cache = cpu__get_cache_id_from_map(cpu, caches[max_level_index].map); in cpu__get_cache_details() 1384 if (caches[i].level == cache_level) { in cpu__get_cache_details() 1386 cache->cache = cpu__get_cache_id_from_map(cpu, caches[i].map); in cpu__get_cache_details() 1389 cpu_cache_level__free(&caches[i]); in cpu__get_cache_details() 1397 cpu_cache_level__free(&caches[i++]); in cpu__get_cache_details() 1690 struct cpu_cache_level *caches = env->caches; in perf_env__get_cache_id_for_cpu() local [all …]
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/Linux-v6.6/arch/openrisc/ |
D | Kconfig | 81 bool "Have write through data caches" 84 Select this if your implementation features write through data caches. 86 caches at relevant times. Most OpenRISC implementations support write- 87 through data caches.
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/Linux-v6.6/drivers/acpi/numa/ |
D | hmat.c | 66 struct list_head caches; member 141 INIT_LIST_HEAD(&target->caches); in alloc_memory_target() 414 list_add_tail(&tcache->node, &target->caches); in hmat_parse_cache() 697 list_for_each_entry(tcache, &target->caches, node) in hmat_register_target_cache() 793 list_for_each_entry_safe(tcache, cnext, &target->caches, node) { in hmat_free_structures()
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/Linux-v6.6/include/linux/ |
D | bpf_mem_alloc.h | 12 struct bpf_mem_caches __percpu *caches; member
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/Linux-v6.6/Documentation/filesystems/nfs/ |
D | rpc-cache.rst | 13 a wide variety of values to be caches. 15 There are a number of caches that are similar in structure though 17 of common code for managing these caches. 19 Examples of caches that are likely to be needed are: 105 includes it on a list of caches that will be regularly
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