/Linux-v6.6/drivers/clk/ux500/ |
D | u8500_of_clk.c | 131 u32 bases[CLKRST_MAX]; in u8500_clk_init() local 144 for (i = 0; i < ARRAY_SIZE(bases); i++) { in u8500_clk_init() 151 bases[i] = r.start; in u8500_clk_init() 303 clk = clk_reg_prcc_pclk("p1_pclk0", "per1clk", bases[CLKRST1_INDEX], in u8500_clk_init() 307 clk = clk_reg_prcc_pclk("p1_pclk1", "per1clk", bases[CLKRST1_INDEX], in u8500_clk_init() 311 clk = clk_reg_prcc_pclk("p1_pclk2", "per1clk", bases[CLKRST1_INDEX], in u8500_clk_init() 315 clk = clk_reg_prcc_pclk("p1_pclk3", "per1clk", bases[CLKRST1_INDEX], in u8500_clk_init() 319 clk = clk_reg_prcc_pclk("p1_pclk4", "per1clk", bases[CLKRST1_INDEX], in u8500_clk_init() 323 clk = clk_reg_prcc_pclk("p1_pclk5", "per1clk", bases[CLKRST1_INDEX], in u8500_clk_init() 327 clk = clk_reg_prcc_pclk("p1_pclk6", "per1clk", bases[CLKRST1_INDEX], in u8500_clk_init() [all …]
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/Linux-v6.6/drivers/gpu/host1x/ |
D | syncpt.c | 26 struct host1x_syncpt_base *bases = host->bases; in host1x_syncpt_base_request() local 30 if (!bases[i].requested) in host1x_syncpt_base_request() 36 bases[i].requested = true; in host1x_syncpt_base_request() 37 return &bases[i]; in host1x_syncpt_base_request() 282 struct host1x_syncpt_base *bases; in host1x_syncpt_init() local 291 bases = devm_kcalloc(host->dev, host->info->nb_bases, sizeof(*bases), in host1x_syncpt_init() 293 if (!bases) in host1x_syncpt_init() 302 bases[i].id = i; in host1x_syncpt_init() 306 host->bases = bases; in host1x_syncpt_init()
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D | dev.h | 129 struct host1x_syncpt_base *bases; member
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/Linux-v6.6/include/linux/ |
D | posix-timers.h | 133 struct posix_cputimer_base bases[CPUCLOCK_MAX]; member 153 pct->bases[0].nextevt = U64_MAX; in posix_cputimers_init() 154 pct->bases[1].nextevt = U64_MAX; in posix_cputimers_init() 155 pct->bases[2].nextevt = U64_MAX; in posix_cputimers_init() 163 pct->bases[CPUCLOCK_SCHED].nextevt = runtime; in posix_cputimers_rt_watchdog() 179 .bases = INIT_CPU_TIMERBASES(s.posix_cputimers.bases), \
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/Linux-v6.6/drivers/gpu/drm/nouveau/dispnv50/ |
D | base.c | 33 } bases[] = { in nv50_base_new() local 46 cid = nvif_mclass(&disp->disp->object, bases); in nv50_base_new() 52 return bases[cid].new(drm, head, bases[cid].oclass, pwndw); in nv50_base_new()
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/Linux-v6.6/drivers/iommu/ |
D | rockchip-iommu.c | 107 void __iomem **bases; member 350 writel(command, iommu->bases[i] + RK_MMU_COMMAND); in rk_iommu_command() 370 rk_iommu_write(iommu->bases[i], RK_MMU_ZAP_ONE_LINE, iova); in rk_iommu_zap_lines() 380 active &= !!(rk_iommu_read(iommu->bases[i], RK_MMU_STATUS) & in rk_iommu_is_stall_active() 392 enable &= !!(rk_iommu_read(iommu->bases[i], RK_MMU_STATUS) & in rk_iommu_is_paging_enabled() 404 done &= rk_iommu_read(iommu->bases[i], RK_MMU_DTE_ADDR) == 0; in rk_iommu_is_reset_done() 429 rk_iommu_read(iommu->bases[i], RK_MMU_STATUS)); in rk_iommu_enable_stall() 450 rk_iommu_read(iommu->bases[i], RK_MMU_STATUS)); in rk_iommu_disable_stall() 471 rk_iommu_read(iommu->bases[i], RK_MMU_STATUS)); in rk_iommu_enable_paging() 492 rk_iommu_read(iommu->bases[i], RK_MMU_STATUS)); in rk_iommu_disable_paging() [all …]
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/Linux-v6.6/drivers/iommu/arm/arm-smmu/ |
D | arm-smmu-nvidia.c | 36 void __iomem *bases[MAX_SMMU_INSTANCES]; member 52 return nvidia_smmu->bases[inst] + (page << smmu->pgshift); in nvidia_smmu_page() 324 nvidia_smmu->bases[0] = smmu->base; in nvidia_smmu_impl_init() 332 nvidia_smmu->bases[i] = devm_ioremap_resource(dev, res); in nvidia_smmu_impl_init() 333 if (IS_ERR(nvidia_smmu->bases[i])) in nvidia_smmu_impl_init() 334 return ERR_CAST(nvidia_smmu->bases[i]); in nvidia_smmu_impl_init()
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/Linux-v6.6/kernel/time/ |
D | posix-cpu-timers.c | 28 pct->bases[CPUCLOCK_PROF].nextevt = cpu_limit * NSEC_PER_SEC; in posix_cputimers_group_init() 154 return !(~pct->bases[CPUCLOCK_PROF].nextevt | in expiry_cache_is_inactive() 155 ~pct->bases[CPUCLOCK_VIRT].nextevt | in expiry_cache_is_inactive() 156 ~pct->bases[CPUCLOCK_SCHED].nextevt); in expiry_cache_is_inactive() 422 return tsk->posix_cputimers.bases + clkidx; in timer_base() 424 return tsk->signal->posix_cputimers.bases + clkidx; in timer_base() 533 cleanup_timerqueue(&pct->bases[CPUCLOCK_PROF].tqhead); in cleanup_timers() 534 cleanup_timerqueue(&pct->bases[CPUCLOCK_VIRT].tqhead); in cleanup_timers() 535 cleanup_timerqueue(&pct->bases[CPUCLOCK_SCHED].tqhead); in cleanup_timers() 861 struct posix_cputimer_base *base = pct->bases; in collect_posix_cputimers() [all …]
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D | tick-internal.h | 176 void clock_was_set(unsigned int bases);
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D | hrtimer.c | 947 void clock_was_set(unsigned int bases) in clock_was_set() argument 969 if (update_needs_ipi(cpu_base, bases)) in clock_was_set()
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/Linux-v6.6/arch/x86/boot/ |
D | early_serial_console.c | 77 static const int bases[] = { 0x3f8, 0x2f8 }; in parse_earlyprintk() local 86 port = bases[idx]; in parse_earlyprintk()
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/Linux-v6.6/drivers/gpu/drm/exynos/ |
D | exynos_drm_scaler.c | 155 static unsigned int bases[] = { in scaler_set_src_base() local 163 scaler_write(src_buf->dma_addr[i], bases[i]); in scaler_set_src_base() 218 static unsigned int bases[] = { in scaler_set_dst_base() local 226 scaler_write(dst_buf->dma_addr[i], bases[i]); in scaler_set_dst_base()
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/Linux-v6.6/arch/x86/kernel/ |
D | early_printk.c | 162 static const int __initconst bases[] = { 0x3f8, 0x2f8 }; in early_serial_init() local 169 early_serial_base = bases[port]; in early_serial_init()
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/Linux-v6.6/Documentation/devicetree/bindings/interrupt-controller/ |
D | mediatek,sysirq.txt | 32 mapped region. Could be multiple bases here. Ex: mt6797 needs 2 reg, others
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/Linux-v6.6/drivers/net/wireless/broadcom/b43/ |
D | pio.c | 82 static const u16 bases[] = { in index_to_pioqueue_base() local 105 B43_WARN_ON(index >= ARRAY_SIZE(bases)); in index_to_pioqueue_base() 106 return bases[index]; in index_to_pioqueue_base()
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/Linux-v6.6/drivers/platform/mellanox/ |
D | Kconfig | 33 are defined per system type bases and include the registers related
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/Linux-v6.6/drivers/gpu/drm/msm/ |
D | NOTES | 58 register interface is same, just different bases.)
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/Linux-v6.6/sound/pci/hda/ |
D | hda_proc.c | 249 static const char * const bases[7] = { in get_jack_location() local 266 return bases[cfg & 0x0f]; in get_jack_location()
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/Linux-v6.6/drivers/gpu/drm/i915/gt/ |
D | intel_engine_cs.c | 345 const struct engine_mmio_base *bases) in __engine_mmio_base() argument 350 if (GRAPHICS_VER(i915) >= bases[i].graphics_ver) in __engine_mmio_base() 354 GEM_BUG_ON(!bases[i].base); in __engine_mmio_base() 356 return bases[i].base; in __engine_mmio_base()
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/Linux-v6.6/Documentation/timers/ |
D | highres.rst | 169 decision is made per timer base and synchronized across per-cpu timer bases in 171 clock event devices for the per-CPU timer bases, but currently only one
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/Linux-v6.6/Documentation/driver-api/thermal/ |
D | cpu-idle-cooling.rst | 89 The implementation of the cooling device bases the number of states on
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/Linux-v6.6/Documentation/arch/x86/ |
D | intel_txt.rst | 68 static root of trust must be used. This bases trust in BIOS
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/Linux-v6.6/Documentation/filesystems/ |
D | vfat.rst | 204 **nostale_ro**: This option bases the *inode* number and filehandle
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/Linux-v6.6/drivers/media/usb/gspca/ |
D | Kconfig | 437 Say Y here if you want support for Xirlink C-It bases cameras.
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/Linux-v6.6/drivers/firmware/cirrus/ |
D | cs_dsp.c | 1955 __be32 bases[] = { xm_base, xm_base, ym_base, ym_base }; in cs_dsp_halo_create_regions() local 1957 return cs_dsp_create_regions(dsp, id, ver, ARRAY_SIZE(types), types, bases); in cs_dsp_halo_create_regions()
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