Searched refs:b01 (Results 1 – 19 of 19) sorted by relevance
23 #define MDIO_C22_OP_WRITE 0b0126 #define MDIO_C45_OP_WRITE 0b01
34 #define LOONGARCH_BREAKPOINT_LEN_4 0b01
1270 __u32 b01:5; member1320 __u32 b01:9; member1346 __u32 b01:8; member1381 __u32 b01:8; member1432 __u32 b01:10; member
29 Bits [6:5] - transaction length. b01 - 72B is supported,
72 #define PSR_BTYPE_JC (0b01 << PSR_BTYPE_SHIFT)
32 #define XY_RATIO_4_3 0b01
1693 0b01 SYNC1699 0b01 SYNC2003 0b01 RESERVED2373 0b01 PHYS2562 0b01 IRQ2567 0b01 WRAP2602 0b01 NON_SECURE
344 - HWFGRTR_EL2.nTPIDR2_EL0 (bit 55) must be initialised to 0b01.346 - HWFGWTR_EL2.nTPIDR2_EL0 (bit 55) must be initialised to 0b01.348 - HWFGRTR_EL2.nSMPRI_EL1 (bit 54) must be initialised to 0b01.350 - HWFGWTR_EL2.nSMPRI_EL1 (bit 54) must be initialised to 0b01.
120 - 2'b01: Bandwidth of TLP payloads
108 - 2'b01: is the same as 2'b11;
560 val |= FIELD_PREP(PNV_OCXL_ATSD_LNCH_IS, 0b01); in pnv_ocxl_tlb_invalidate()
109 #define AD74413R_ADC_REJECTION_NONE 0b01135 #define AD74413R_CONV_SEQ_SINGLE 0b01
153 AD74115_ADC_CONV_SEQ_SINGLE = 0b01,
43 #define LPC_TYIRQX_HIGH 0b01
313 0b01,
260 #define MSA311_PWR_MODE_LOW 0b01
198 AD4130_FIFO_MODE_WM = 0b01,
310 #define HISI_HIP08_CORE_COMMIT_LVL_1 0b01
686 b01 - Reserved.
