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Searched refs:amdgpu_sriov_vf (Results 1 – 25 of 111) sorted by relevance

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/Linux-v6.6/drivers/gpu/drm/amd/amdgpu/
Dpsp_v11_0_8.c37 if (amdgpu_sriov_vf(adev)) { in psp_v11_0_8_ring_stop()
68 if (amdgpu_sriov_vf(adev)) { in psp_v11_0_8_ring_create()
150 if (amdgpu_sriov_vf(adev)) in psp_v11_0_8_ring_get_wptr()
162 if (amdgpu_sriov_vf(adev)) { in psp_v11_0_8_ring_set_wptr()
Damdgpu_virt.h273 #define amdgpu_sriov_vf(adev) \ macro
283 (amdgpu_sriov_vf((adev)) && !amdgpu_sriov_runtime((adev)))
286 (amdgpu_sriov_vf((adev)) && \
290 (amdgpu_sriov_vf((adev)) && \
294 (amdgpu_sriov_vf((adev)) && \
298 (amdgpu_sriov_vf((adev)) && \
Dpsp_v12_0.c191 if (amdgpu_sriov_vf(psp->adev)) { in psp_v12_0_ring_create()
243 if (amdgpu_sriov_vf(adev)) in psp_v12_0_ring_stop()
254 if (amdgpu_sriov_vf(adev)) in psp_v12_0_ring_stop()
321 if (amdgpu_sriov_vf(adev)) in psp_v12_0_ring_get_wptr()
333 if (amdgpu_sriov_vf(adev)) { in psp_v12_0_ring_set_wptr()
Dpsp_v3_1.c196 if (amdgpu_sriov_vf(adev)) { in psp_v3_1_ring_create()
258 if (amdgpu_sriov_vf(adev)) in psp_v3_1_ring_stop()
269 if (amdgpu_sriov_vf(adev)) in psp_v3_1_ring_stop()
345 if (amdgpu_sriov_vf(adev)) in psp_v3_1_ring_get_wptr()
356 if (amdgpu_sriov_vf(adev)) { in psp_v3_1_ring_set_wptr()
Damdgpu_psp.c98 if (amdgpu_sriov_vf(adev)) { in psp_check_pmfw_centralized_cstate_management()
182 adev->psp.sup_pd_fw_up = !amdgpu_sriov_vf(adev); in psp_early_init()
221 adev->psp.sup_ifwi_up = !amdgpu_sriov_vf(adev); in psp_early_init()
235 if (amdgpu_sriov_vf(adev)) in psp_early_init()
254 pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL; in psp_free_shared_bufs()
469 amdgpu_sriov_vf(adev) ? in psp_sw_init()
665 psp->cmd_buf_mem->resp.status == PSP_ERR_UNKNOWN_COMMAND) && amdgpu_sriov_vf(psp->adev); in psp_cmd_submit_buf()
687 if ((ucode && amdgpu_sriov_vf(psp->adev)) || !timeout) { in psp_cmd_submit_buf()
731 if (amdgpu_sriov_vf(psp->adev)) in psp_prep_tmr_cmd_buf()
804 if (!amdgpu_sriov_vf(psp->adev) && in psp_tmr_init()
[all …]
Dathub_v1_0.c68 if (amdgpu_sriov_vf(adev)) in athub_v1_0_set_clockgating()
94 if (amdgpu_sriov_vf(adev)) in athub_v1_0_get_clockgating()
Dgmc_v11_0.c109 if (!amdgpu_sriov_vf(adev)) { in gmc_v11_0_process_interrupt()
136 if (!amdgpu_sriov_vf(adev)) in gmc_v11_0_process_interrupt()
158 if (!amdgpu_sriov_vf(adev)) { in gmc_v11_0_set_irq_funcs()
175 (!amdgpu_sriov_vf(adev))); in gmc_v11_0_use_invalidate_semaphore()
257 !amdgpu_sriov_vf(adev)) { in gmc_v11_0_flush_vm_hub()
298 (amdgpu_sriov_runtime(adev) || !amdgpu_sriov_vf(adev))) { in gmc_v11_0_flush_gpu_tlb()
687 if (amdgpu_sriov_vf(adev)) in gmc_v11_0_vram_gtt_location()
811 if (!amdgpu_sriov_vf(adev)) { in gmc_v11_0_sw_init()
891 if (amdgpu_sriov_vf(adev)) { in gmc_v11_0_init_golden_registers()
970 if (amdgpu_sriov_vf(adev)) { in gmc_v11_0_hw_fini()
Dpsp_v13_0_4.c200 if (amdgpu_sriov_vf(adev)) { in psp_v13_0_4_ring_stop()
231 if (amdgpu_sriov_vf(adev)) { in psp_v13_0_4_ring_create()
313 if (amdgpu_sriov_vf(adev)) in psp_v13_0_4_ring_get_wptr()
325 if (amdgpu_sriov_vf(adev)) { in psp_v13_0_4_ring_set_wptr()
Dmmhub_v1_0.c113 if (amdgpu_sriov_vf(adev)) in mmhub_v1_0_init_system_aperture_regs()
159 if (amdgpu_sriov_vf(adev)) in mmhub_v1_0_init_cache_regs()
211 if (amdgpu_sriov_vf(adev)) in mmhub_v1_0_disable_identity_aperture()
302 if (amdgpu_sriov_vf(adev)) in mmhub_v1_0_update_power_gating()
313 if (amdgpu_sriov_vf(adev)) { in mmhub_v1_0_gart_enable()
359 if (!amdgpu_sriov_vf(adev)) { in mmhub_v1_0_gart_disable()
378 if (amdgpu_sriov_vf(adev)) in mmhub_v1_0_set_fault_enable_default()
529 if (amdgpu_sriov_vf(adev)) in mmhub_v1_0_set_clockgating()
554 if (amdgpu_sriov_vf(adev)) in mmhub_v1_0_get_clockgating()
Dnv.c221 if (amdgpu_sriov_vf(adev)) { in nv_query_video_codecs()
645 if (!amdgpu_sriov_vf(adev)) { in nv_common_early_init()
741 if (amdgpu_sriov_vf(adev)) in nv_common_early_init()
762 if (amdgpu_sriov_vf(adev)) { in nv_common_early_init()
946 if (amdgpu_sriov_vf(adev)) { in nv_common_early_init()
958 if (amdgpu_sriov_vf(adev)) { in nv_common_late_init()
987 if (amdgpu_sriov_vf(adev)) in nv_common_sw_init()
1016 if (adev->nbio.funcs->remap_hdp_registers && !amdgpu_sriov_vf(adev)) in nv_common_hw_init()
1073 if (amdgpu_sriov_vf(adev)) in nv_common_set_clockgating_state()
1110 if (amdgpu_sriov_vf(adev)) in nv_common_get_clockgating_state()
Damdgpu_device.c1115 if (amdgpu_sriov_vf(adev)) in amdgpu_device_resize_fb_bar()
1198 if (amdgpu_sriov_vf(adev)) in amdgpu_device_need_post()
1871 if (amdgpu_sriov_vf(adev) && !adev->enable_virtual_display) { in amdgpu_device_set_sriov_virtual_display()
2028 if (amdgpu_sriov_vf(adev)) { in amdgpu_device_ip_early_init()
2102 if (amdgpu_sriov_vf(adev) || sched_policy == KFD_SCHED_POLICY_NO_HWS) in amdgpu_device_ip_early_init()
2104 if (amdgpu_sriov_vf(adev) && adev->asic_type == CHIP_SIENNA_CICHLID) in amdgpu_device_ip_early_init()
2149 if (amdgpu_sriov_vf(adev)) in amdgpu_device_ip_early_init()
2174 (amdgpu_sriov_vf(adev) && (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_PSP)) || in amdgpu_device_ip_hw_init_phase1()
2249 if (!amdgpu_sriov_vf(adev) || adev->asic_type == CHIP_TONGA) in amdgpu_device_fw_loading()
2341 if (amdgpu_sriov_vf(adev)) in amdgpu_device_ip_init()
[all …]
Damdgpu_vf_error.c36 if (!amdgpu_sriov_vf(adev)) in amdgpu_vf_error_put()
57 if ((NULL == adev) || (!amdgpu_sriov_vf(adev)) || in amdgpu_vf_error_trans_all()
Dmmhub_v2_0.c223 if (!amdgpu_sriov_vf(adev)) { in mmhub_v2_0_init_system_aperture_regs()
281 if (amdgpu_sriov_vf(adev)) in mmhub_v2_0_init_cache_regs()
342 if (amdgpu_sriov_vf(adev)) in mmhub_v2_0_disable_identity_aperture()
480 if (amdgpu_sriov_vf(adev)) in mmhub_v2_0_set_fault_enable_default()
651 if (amdgpu_sriov_vf(adev)) in mmhub_v2_0_set_clockgating()
676 if (amdgpu_sriov_vf(adev)) in mmhub_v2_0_get_clockgating()
Dmmhub_v3_0.c172 if (amdgpu_sriov_vf(adev)) in mmhub_v3_0_init_system_aperture_regs()
238 if (amdgpu_sriov_vf(adev)) in mmhub_v3_0_init_cache_regs()
299 if (amdgpu_sriov_vf(adev)) in mmhub_v3_0_disable_identity_aperture()
437 if (amdgpu_sriov_vf(adev)) in mmhub_v3_0_set_fault_enable_default()
623 if (amdgpu_sriov_vf(adev)) in mmhub_v3_0_set_clockgating()
641 if (amdgpu_sriov_vf(adev)) in mmhub_v3_0_get_clockgating()
Dpsp_v11_0.c267 if (amdgpu_sriov_vf(adev)) in psp_v11_0_ring_stop()
278 if (amdgpu_sriov_vf(adev)) in psp_v11_0_ring_stop()
296 if (amdgpu_sriov_vf(adev)) { in psp_v11_0_ring_create()
569 if (amdgpu_sriov_vf(adev)) in psp_v11_0_ring_get_wptr()
581 if (amdgpu_sriov_vf(adev)) { in psp_v11_0_ring_set_wptr()
Dsdma_v5_0.c205 if (amdgpu_sriov_vf(adev)) in sdma_v5_0_init_golden_registers()
624 if (!amdgpu_sriov_vf(adev)) { in sdma_v5_0_ctx_switch_enable()
638 if (!amdgpu_sriov_vf(adev)) in sdma_v5_0_ctx_switch_enable()
662 if (amdgpu_sriov_vf(adev)) in sdma_v5_0_enable()
695 if (!amdgpu_sriov_vf(adev)) in sdma_v5_0_gfx_resume()
747 if (!amdgpu_sriov_vf(adev)) { /* only bare-metal use register write for wptr */ in sdma_v5_0_gfx_resume()
772 if (amdgpu_sriov_vf(adev)) in sdma_v5_0_gfx_resume()
778 if (!amdgpu_sriov_vf(adev)) { in sdma_v5_0_gfx_resume()
801 if (!amdgpu_sriov_vf(adev)) { in sdma_v5_0_gfx_resume()
820 if (amdgpu_sriov_vf(adev)) { /* bare-metal sequence doesn't need below to lines */ in sdma_v5_0_gfx_resume()
[all …]
Dgmc_v9_0.c647 if (amdgpu_sriov_vf(adev)) in gmc_v9_0_process_interrupt()
737 if (!amdgpu_sriov_vf(adev) && in gmc_v9_0_set_irq_funcs()
779 (!amdgpu_sriov_vf(adev)) && in gmc_v9_0_use_invalidate_semaphore()
848 (amdgpu_sriov_runtime(adev) || !amdgpu_sriov_vf(adev)) && in gmc_v9_0_flush_gpu_tlb()
955 u32 usec_timeout = amdgpu_sriov_vf(adev) ? SRIOV_USEC_TIMEOUT : adev->usec_timeout; in gmc_v9_0_flush_gpu_tlb_pasid()
1431 if (amdgpu_sriov_vf(adev)) in gmc_v9_0_query_memory_partition()
1641 if (!amdgpu_sriov_vf(adev) && in gmc_v9_0_late_init()
1734 if ((!amdgpu_sriov_vf(adev) && in gmc_v9_0_mc_init()
1988 if (amdgpu_sriov_vf(adev)) in gmc_v9_0_init_mem_ranges()
2006 if (!amdgpu_sriov_vf(adev)) { in gmc_v9_4_3_init_vram_info()
[all …]
Dmmhub_v3_0_2.c170 if (!amdgpu_sriov_vf(adev)) { in mmhub_v3_0_2_init_system_aperture_regs()
230 if (amdgpu_sriov_vf(adev)) in mmhub_v3_0_2_init_cache_regs()
291 if (amdgpu_sriov_vf(adev)) in mmhub_v3_0_2_disable_identity_aperture()
429 if (amdgpu_sriov_vf(adev)) in mmhub_v3_0_2_set_fault_enable_default()
546 if (amdgpu_sriov_vf(adev)) in mmhub_v3_0_2_set_clockgating()
Dgmc_v10_0.c141 if (!amdgpu_sriov_vf(adev)) { in gmc_v10_0_process_interrupt()
171 if (!amdgpu_sriov_vf(adev)) in gmc_v10_0_process_interrupt()
193 if (!amdgpu_sriov_vf(adev)) { in gmc_v10_0_set_irq_funcs()
210 (!amdgpu_sriov_vf(adev))); in gmc_v10_0_use_invalidate_semaphore()
340 (amdgpu_sriov_runtime(adev) || !amdgpu_sriov_vf(adev)) && in gmc_v10_0_flush_gpu_tlb()
424 u32 usec_timeout = amdgpu_sriov_vf(adev) ? SRIOV_USEC_TIMEOUT : adev->usec_timeout; in gmc_v10_0_flush_gpu_tlb_pasid()
954 if (!amdgpu_sriov_vf(adev)) { in gmc_v10_0_sw_init()
1136 if (amdgpu_sriov_vf(adev)) { in gmc_v10_0_hw_fini()
Dsoc15.c912 if (!amdgpu_sriov_vf(adev)) { in soc15_common_early_init()
1168 if (amdgpu_sriov_vf(adev)) { in soc15_common_early_init()
1180 if (amdgpu_sriov_vf(adev)) in soc15_common_late_init()
1195 if (amdgpu_sriov_vf(adev)) in soc15_common_sw_init()
1220 if (!amdgpu_sriov_vf(adev)) { in soc15_sdma_doorbell_range_init()
1241 if (adev->nbio.funcs->remap_hdp_registers && !amdgpu_sriov_vf(adev)) in soc15_common_hw_init()
1270 if (amdgpu_sriov_vf(adev)) in soc15_common_hw_fini()
1364 if (amdgpu_sriov_vf(adev)) in soc15_common_set_clockgating_state()
1416 if (amdgpu_sriov_vf(adev)) in soc15_common_get_clockgating_state()
Dgfxhub_v1_0.c100 if (!amdgpu_sriov_vf(adev) || adev->asic_type <= CHIP_VEGA10) { in gfxhub_v1_0_init_system_aperture_regs()
327 if (!amdgpu_sriov_vf(adev)) in gfxhub_v1_0_gart_enable()
331 if (!amdgpu_sriov_vf(adev)) in gfxhub_v1_0_gart_enable()
350 if (amdgpu_sriov_vf(adev)) in gfxhub_v1_0_gart_disable()
Dnavi10_ih.c123 if (amdgpu_sriov_vf(adev) && amdgpu_sriov_reg_indirect_ih(adev)) { in force_update_wptr_for_self_int()
133 if (amdgpu_sriov_vf(adev) && amdgpu_sriov_reg_indirect_ih(adev)) { in force_update_wptr_for_self_int()
168 if (amdgpu_sriov_vf(adev) && amdgpu_sriov_reg_indirect_ih(adev)) { in navi10_ih_toggle_ring_interrupts()
282 if (amdgpu_sriov_vf(adev) && amdgpu_sriov_reg_indirect_ih(adev)) { in navi10_ih_enable_ring()
496 if (amdgpu_sriov_vf(adev)) in navi10_ih_set_rptr()
Dpsp_v13_0.c88 if (!amdgpu_sriov_vf(adev)) { in psp_v13_0_init_microcode()
307 if (amdgpu_sriov_vf(adev)) { in psp_v13_0_ring_stop()
338 if (amdgpu_sriov_vf(adev)) { in psp_v13_0_ring_create()
420 if (amdgpu_sriov_vf(adev)) in psp_v13_0_ring_get_wptr()
432 if (amdgpu_sriov_vf(adev)) { in psp_v13_0_ring_set_wptr()
Dsoc21.c160 if (amdgpu_sriov_vf(adev)) { in soc21_query_video_codecs()
696 if (amdgpu_sriov_vf(adev)) { in soc21_common_early_init()
708 if (amdgpu_sriov_vf(adev)) { in soc21_common_late_init()
746 if (amdgpu_sriov_vf(adev)) in soc21_common_sw_init()
769 if (adev->nbio.funcs->remap_hdp_registers && !amdgpu_sriov_vf(adev)) in soc21_common_hw_init()
789 if (amdgpu_sriov_vf(adev)) { in soc21_common_hw_fini()
Dsdma_v5_2.c438 if (!amdgpu_sriov_vf(adev)) { in sdma_v5_2_ctx_switch_enable()
466 if (!amdgpu_sriov_vf(adev)) { in sdma_v5_2_enable()
498 if (!amdgpu_sriov_vf(adev)) in sdma_v5_2_gfx_resume()
548 if (!amdgpu_sriov_vf(adev)) { /* only bare-metal use register write for wptr */ in sdma_v5_2_gfx_resume()
570 if (amdgpu_sriov_vf(adev)) in sdma_v5_2_gfx_resume()
578 if (!amdgpu_sriov_vf(adev)) { in sdma_v5_2_gfx_resume()
620 if (amdgpu_sriov_vf(adev)) { /* bare-metal sequence doesn't need below to lines */ in sdma_v5_2_gfx_resume()
736 if (amdgpu_sriov_vf(adev)) { in sdma_v5_2_start()
1288 if (amdgpu_sriov_vf(adev)) { in sdma_v5_2_hw_fini()
1401 if (!amdgpu_sriov_vf(adev)) { in sdma_v5_2_set_trap_irq_state()
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