Searched refs:XIIC_INTR_TX_EMPTY_MASK (Results 1 – 1 of 1) sorted by relevance
181 #define XIIC_INTR_TX_EMPTY_MASK 0x04 /* 1 = Tx FIFO/reg empty */ macro196 (XIIC_INTR_TX_ERROR_MASK | XIIC_INTR_TX_EMPTY_MASK | XIIC_INTR_TX_HALF_MASK)348 !(isr & XIIC_INTR_TX_EMPTY_MASK); in xiic_wait_tx_empty()763 if (pend & (XIIC_INTR_TX_EMPTY_MASK | XIIC_INTR_TX_HALF_MASK)) { in xiic_process()767 (XIIC_INTR_TX_EMPTY_MASK | XIIC_INTR_TX_HALF_MASK)); in xiic_process()888 xiic_irq_dis(i2c, XIIC_INTR_TX_HALF_MASK | XIIC_INTR_TX_EMPTY_MASK); in xiic_start_recv()1025 xiic_irq_clr_en(i2c, XIIC_INTR_TX_EMPTY_MASK | in xiic_start_send()1072 xiic_irq_clr_en(i2c, XIIC_INTR_TX_EMPTY_MASK | in xiic_start_send()
