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Searched refs:WR_CONFIRM (Results 1 – 12 of 12) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/amdgpu/
Dsoc15d.h119 #define WR_CONFIRM (1 << 20) macro
Dnvd.h98 #define WR_CONFIRM (1 << 20) macro
Dvid.h151 #define WR_CONFIRM (1 << 20) macro
Dcikd.h269 #define WR_CONFIRM (1 << 20) macro
Dgfx_v9_4_3.c219 (wc ? WR_CONFIRM : 0)); in gfx_v9_4_3_write_data_to_reg()
305 ib.ptr[1] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM; in gfx_v9_4_3_ring_test_ib()
2634 WRITE_DATA_DST_SEL(5) | WR_CONFIRM)); in gfx_v9_4_3_ring_emit_fence_kiq()
2643 WRITE_DATA_DST_SEL(0) | WR_CONFIRM)); in gfx_v9_4_3_ring_emit_fence_kiq()
2674 cmd = WRITE_DATA_ENGINE_SEL(1) | WR_CONFIRM; in gfx_v9_4_3_ring_emit_wreg()
2680 cmd = WR_CONFIRM; in gfx_v9_4_3_ring_emit_wreg()
Dgfx_v9_0.c966 (wc ? WR_CONFIRM : 0)); in gfx_v9_0_write_data_to_reg()
1048 ib.ptr[1] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM; in gfx_v9_0_ring_test_ib()
5385 WRITE_DATA_DST_SEL(5) | WR_CONFIRM)); in gfx_v9_0_ring_emit_fence_kiq()
5394 WRITE_DATA_DST_SEL(0) | WR_CONFIRM)); in gfx_v9_0_ring_emit_fence_kiq()
5434 WR_CONFIRM) | in gfx_v9_0_ring_emit_ce_meta()
5547 WR_CONFIRM) | in gfx_v9_0_ring_emit_de_meta()
5652 cmd = WRITE_DATA_ENGINE_SEL(1) | WR_CONFIRM; in gfx_v9_0_ring_emit_wreg()
5658 cmd = WR_CONFIRM; in gfx_v9_0_ring_emit_wreg()
Dgfx_v11_0.c285 WRITE_DATA_DST_SEL(0) | (wc ? WR_CONFIRM : 0)); in gfx_v11_0_write_data_to_reg()
401 ib.ptr[1] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM; in gfx_v11_0_ring_test_ib()
5444 WRITE_DATA_DST_SEL(5) | WR_CONFIRM)); in gfx_v11_0_ring_emit_fence_kiq()
5453 WRITE_DATA_DST_SEL(0) | WR_CONFIRM)); in gfx_v11_0_ring_emit_fence_kiq()
5615 WR_CONFIRM) | in gfx_v11_0_ring_emit_de_meta()
5661 cmd = WRITE_DATA_ENGINE_SEL(1) | WR_CONFIRM; in gfx_v11_0_ring_emit_wreg()
5667 cmd = WR_CONFIRM; in gfx_v11_0_ring_emit_wreg()
Dgfx_v8_0.c892 ib.ptr[1] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM; in gfx_v8_0_ring_test_ib()
6275 WRITE_DATA_DST_SEL(5) | WR_CONFIRM)); in gfx_v8_0_ring_emit_fence_kiq()
6284 WRITE_DATA_DST_SEL(0) | WR_CONFIRM)); in gfx_v8_0_ring_emit_fence_kiq()
6381 cmd = WRITE_DATA_ENGINE_SEL(1) | WR_CONFIRM; in gfx_v8_0_ring_emit_wreg()
6387 cmd = WR_CONFIRM; in gfx_v8_0_ring_emit_wreg()
7192 WR_CONFIRM) | in gfx_v8_0_ring_emit_ce_meta()
7225 WR_CONFIRM) | in gfx_v8_0_ring_emit_de_meta()
Dgfx_v10_0.c3738 WRITE_DATA_DST_SEL(0) | (wc ? WR_CONFIRM : 0)); in gfx_v10_0_write_data_to_reg()
3846 ib.ptr[1] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM; in gfx_v10_0_ring_test_ib()
8458 WRITE_DATA_DST_SEL(5) | WR_CONFIRM)); in gfx_v10_0_ring_emit_fence_kiq()
8467 WRITE_DATA_DST_SEL(0) | WR_CONFIRM)); in gfx_v10_0_ring_emit_fence_kiq()
8616 WR_CONFIRM) | in gfx_v10_0_ring_emit_ce_meta()
8667 WR_CONFIRM) | in gfx_v10_0_ring_emit_de_meta()
8713 cmd = WRITE_DATA_ENGINE_SEL(1) | WR_CONFIRM; in gfx_v10_0_ring_emit_wreg()
8719 cmd = WR_CONFIRM; in gfx_v10_0_ring_emit_wreg()
Dsid.h1709 #define WR_CONFIRM (1 << 20) macro
/Linux-v6.6/drivers/gpu/drm/radeon/
Dsid.h1646 #define WR_CONFIRM (1 << 20) macro
Dcikd.h1737 #define WR_CONFIRM (1 << 20) macro