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Searched refs:VGA_HDP_CONTROL__VGA_TEST_RESET_CONTROL_MASK (Results 1 – 19 of 19) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_sh_mask.h9483 #define VGA_HDP_CONTROL__VGA_TEST_RESET_CONTROL_MASK 0x01000000L macro
Ddce_8_0_sh_mask.h11013 #define VGA_HDP_CONTROL__VGA_TEST_RESET_CONTROL_MASK 0x1000000 macro
Ddce_10_0_sh_mask.h11397 #define VGA_HDP_CONTROL__VGA_TEST_RESET_CONTROL_MASK 0x1000000 macro
Ddce_11_0_sh_mask.h11209 #define VGA_HDP_CONTROL__VGA_TEST_RESET_CONTROL_MASK 0x1000000 macro
Ddce_11_2_sh_mask.h12463 #define VGA_HDP_CONTROL__VGA_TEST_RESET_CONTROL_MASK 0x1000000 macro
Ddce_12_0_sh_mask.h2070 #define VGA_HDP_CONTROL__VGA_TEST_RESET_CONTROL_MASK … macro
/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_sh_mask.h107 #define VGA_HDP_CONTROL__VGA_TEST_RESET_CONTROL_MASK … macro
Ddcn_3_0_1_sh_mask.h518 #define VGA_HDP_CONTROL__VGA_TEST_RESET_CONTROL_MASK … macro
Ddcn_2_1_0_sh_mask.h121 #define VGA_HDP_CONTROL__VGA_TEST_RESET_CONTROL_MASK … macro
Ddcn_3_2_1_sh_mask.h4305 #define VGA_HDP_CONTROL__VGA_TEST_RESET_CONTROL_MASK … macro
Ddcn_1_0_sh_mask.h1620 #define VGA_HDP_CONTROL__VGA_TEST_RESET_CONTROL_MASK … macro
Ddcn_3_1_5_sh_mask.h5012 #define VGA_HDP_CONTROL__VGA_TEST_RESET_CONTROL_MASK … macro
Ddcn_3_1_2_sh_mask.h7174 #define VGA_HDP_CONTROL__VGA_TEST_RESET_CONTROL_MASK … macro
Ddcn_3_0_2_sh_mask.h120 #define VGA_HDP_CONTROL__VGA_TEST_RESET_CONTROL_MASK … macro
Ddcn_3_1_4_sh_mask.h7659 #define VGA_HDP_CONTROL__VGA_TEST_RESET_CONTROL_MASK … macro
Ddcn_3_1_6_sh_mask.h7819 #define VGA_HDP_CONTROL__VGA_TEST_RESET_CONTROL_MASK … macro
Ddcn_3_0_0_sh_mask.h101 #define VGA_HDP_CONTROL__VGA_TEST_RESET_CONTROL_MASK … macro
Ddcn_2_0_0_sh_mask.h120 #define VGA_HDP_CONTROL__VGA_TEST_RESET_CONTROL_MASK … macro
Ddcn_3_2_0_sh_mask.h4304 #define VGA_HDP_CONTROL__VGA_TEST_RESET_CONTROL_MASK … macro