Searched refs:VE_DEC_H265_CTRL (Results 1 – 2 of 2) sorted by relevance
82 u32 reg = cedrus_read(dev, VE_DEC_H265_CTRL); in cedrus_h265_irq_disable()86 cedrus_write(dev, VE_DEC_H265_CTRL, reg); in cedrus_h265_irq_disable()831 cedrus_write(dev, VE_DEC_H265_CTRL, VE_DEC_H265_CTRL_IRQ_MASK); in cedrus_h265_setup()
407 #define VE_DEC_H265_CTRL (VE_ENGINE_DEC_H265 + 0x30) macro