Searched refs:V4L2_CID_STATELESS_HEVC_SPS (Results 1 – 11 of 11) sorted by relevance
69 V4L2_CID_STATELESS_HEVC_SPS); in cedrus_device_run()
45 } else if (ctrl->id == V4L2_CID_STATELESS_HEVC_SPS) { in cedrus_try_ctrl()181 .id = V4L2_CID_STATELESS_HEVC_SPS,
109 .id = V4L2_CID_STATELESS_HEVC_SPS,456 case V4L2_CID_STATELESS_HEVC_SPS: in mtk_vdec_s_ctrl()506 (hdr_ctrl->id == V4L2_CID_STATELESS_HEVC_SPS || in mtk_vdec_s_ctrl()
1227 case V4L2_CID_STATELESS_HEVC_SPS: return "HEVC Sequence Parameter Set"; in v4l2_ctrl_get_name()1556 case V4L2_CID_STATELESS_HEVC_SPS: in v4l2_ctrl_fill()
266 } else if (ctrl->id == V4L2_CID_STATELESS_HEVC_SPS) { in hantro_try_ctrl()339 case V4L2_CID_STATELESS_HEVC_SPS: { in hantro_hevc_s_ctrl()540 .id = V4L2_CID_STATELESS_HEVC_SPS,
190 hantro_get_ctrl(ctx, V4L2_CID_STATELESS_HEVC_SPS); in hantro_hevc_dec_prepare_run()
178 .cfg.id = V4L2_CID_STATELESS_HEVC_SPS,
466 run.hevc.sps = visl_find_control_data(ctx, V4L2_CID_STATELESS_HEVC_SPS); in visl_device_run()
607 sps = vdec_hevc_get_ctrl_ptr(inst->ctx, V4L2_CID_STATELESS_HEVC_SPS); in vdec_hevc_slice_fill_decode_parameters()
2062 #define V4L2_CID_STATELESS_HEVC_SPS (V4L2_CID_CODEC_STATELESS_BASE + 400) macro
2054 ``V4L2_CID_STATELESS_HEVC_SPS (struct)``
