Searched refs:Thread (Results 1 – 25 of 45) sorted by relevance
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/Linux-v6.6/Documentation/tools/rtla/ |
D | common_timerlat_options.rst | 18 Stop trace if the *Thread* latency is higher than the argument in us. 22 Save the stack trace at the *IRQ* if a *Thread* latency is higher than the
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D | rtla-timerlat-top.rst | 51 0 00:00:12 | IRQ Timer Latency (us) | Thread Timer Latency (us) 104 Thread latency: 41.96 us (100%)
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D | common_timerlat_description.rst | 8 prints the timer latency at the timer *IRQ* handler and the *Thread*
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D | rtla-timerlat.rst | 20 prints the timer latency at the timer *IRQ* handler and the *Thread* handler.
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D | rtla-osnoise-top.rst | 44 …% CPU Aval Max Noise Max Single HW NMI IRQ Softirq Thread
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/Linux-v6.6/tools/perf/scripts/python/ |
D | gecko.py | 92 class Thread: class 295 thread = Thread(comm=comm, pid=pid, tid=tid) 304 http_server_thread = threading.Thread(target=test, args=(CORSRequestHandler, HTTPServer,))
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/Linux-v6.6/Documentation/admin-guide/hw-vuln/ |
D | cross-thread-rsb.rst | 4 Cross-Thread Return Address Predictions 32 CVE-2022-27672 Cross-Thread Return Address Predictions
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D | gather_data_sampling.rst | 24 Because the buffers are shared between Hyper-Threads cross Hyper-Thread attacks
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D | mds.rst | 58 Hyper-Thread attacks are possible. 161 other variants cannot be protected against cross Hyper-Thread attacks.
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/Linux-v6.6/Documentation/powerpc/ |
D | dscr.rst | 16 dscr /* Thread DSCR value */ 17 dscr_inherit /* Thread has changed default DSCR */
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D | imc.rst | 19 on-chip but off-core), Core level and Thread level. 25 The Core and Thread IMC PMU counters are handled in the core. Core level PMU
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/Linux-v6.6/Documentation/usb/ |
D | dwc3.rst | 39 sleeping is handed over to the Thread. The event is saved in an
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/Linux-v6.6/Documentation/arch/x86/ |
D | mds.rst | 90 This does not protect against cross Hyper-Thread attacks except for MSBDS 167 protected against cross Hyper-Thread attacks because the Fill Buffer and 177 that stale data from the idling CPU from spilling to the Hyper-Thread
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D | sgx.rst | 58 **Thread Control Structure (TCS)** 59 Thread Control Structure pages define the entry points to an enclave and
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D | topology.rst | 119 Thread-related topology information in the kernel:
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/Linux-v6.6/Documentation/virt/kvm/devices/ |
D | xive.rst | 25 1. Thread Interrupt Management Area (TIMA) 27 Each thread has an associated Thread Interrupt Management context
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/Linux-v6.6/arch/arm/mm/ |
D | proc-v7m.S | 146 msr control, r1 @ Thread mode has unpriviledged access
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/Linux-v6.6/arch/arm/boot/dts/st/ |
D | stm32h750i-art-pi.dts | 53 model = "RT-Thread STM32H750i-ART-PI board";
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/Linux-v6.6/Documentation/arch/parisc/ |
D | registers.rst | 32 CR27 (TR 3) Thread descriptor pointer
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/Linux-v6.6/Documentation/mm/ |
D | vmalloced-kernel-stacks.rst | 105 Thread stack allocation is initiated from clone(), fork(), vfork(),
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/Linux-v6.6/tools/perf/Documentation/ |
D | intel-hybrid.txt | 127 Thread mode example:
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/Linux-v6.6/Documentation/filesystems/nfs/ |
D | knfsd-stats.rst | 41 Thread pool ids are a contiguous set of small integers starting
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/Linux-v6.6/Documentation/trace/coresight/ |
D | coresight-perf.rst | 99 CoreSight / Thread Loop 10 Threads - Check TID
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/Linux-v6.6/Documentation/arch/x86/x86_64/ |
D | fsgs.rst | 28 The FS segment is commonly used to address Thread Local Storage (TLS). FS
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/Linux-v6.6/tools/testing/kunit/ |
D | kunit_kernel.py | 355 waiter = threading.Thread(target=_wait_proc)
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