Searched refs:TX_READY (Results 1 – 3 of 3) sorted by relevance
35 @ Clear TX_READY by writing to the UARTDM_CR register
97 #define TX_READY 0x02 macro272 if ((inb(HOST_CTRL_IO(io_base)) & TX_READY) != 0) { in host_write_unsafe()
354 XSIR_GET_BITS(status, SIR0_STATUS, TX_READY)) in xgbe_phy_complete_ratechange()