Searched refs:TG3_64BIT_REG_LOW (Results 1 – 2 of 2) sorted by relevance
18 #define TG3_64BIT_REG_LOW 0x04UL macro322 TG3_64BIT_REG_LOW)325 TG3_64BIT_REG_LOW)
522 if (off == (MAILBOX_RCVRET_CON_IDX_0 + TG3_64BIT_REG_LOW)) { in tg3_write_indirect_mbox()524 TG3_64BIT_REG_LOW, val); in tg3_write_indirect_mbox()529 TG3_64BIT_REG_LOW, val); in tg3_write_indirect_mbox()541 if ((off == (MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW)) && in tg3_write_indirect_mbox()7530 tw32_mailbox_f(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, 0x00000001); in tg3_interrupt()7541 tw32_mailbox_f(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, in tg3_interrupt()7579 tw32_mailbox_f(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, 0x00000001); in tg3_interrupt_tagged()9399 (bdinfo_addr + TG3_BDINFO_HOST_ADDR + TG3_64BIT_REG_LOW), in tg3_set_bdinfo()9624 u32 mbox = MAILBOX_SNDNIC_PROD_IDX_0 + TG3_64BIT_REG_LOW; in tg3_rings_reset()9635 tw32(HOSTCC_STATUS_BLK_HOST_ADDR + TG3_64BIT_REG_LOW, in tg3_rings_reset()[all …]
