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Searched refs:SH_MEM_BASES__SHARED_BASE__SHIFT (Results 1 – 17 of 17) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/amdkfd/
Dkfd_device_queue_manager_v10.c48 return (shared_base << SH_MEM_BASES__SHARED_BASE__SHIFT) | in compute_sh_mem_bases_64bit()
Dkfd_device_queue_manager_v11.c47 return (shared_base << SH_MEM_BASES__SHARED_BASE__SHIFT) | in compute_sh_mem_bases_64bit()
Dkfd_device_queue_manager_v9.c47 return (shared_base << SH_MEM_BASES__SHARED_BASE__SHIFT) | in compute_sh_mem_bases_64bit()
Dkfd_device_queue_manager_vi.c76 SH_MEM_BASES__SHARED_BASE__SHIFT; in compute_sh_mem_bases_64bit()
/Linux-v6.6/drivers/gpu/drm/amd/amdgpu/
Dgfx_v11_0.c1632 sh_mem_bases = (LDS_APP_BASE << SH_MEM_BASES__SHARED_BASE__SHIFT) | in gfx_v11_0_init_compute_vmid()
/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_2_sh_mask.h12656 #define SH_MEM_BASES__SHARED_BASE__SHIFT 0x10 macro
Dgfx_8_0_sh_mask.h14542 #define SH_MEM_BASES__SHARED_BASE__SHIFT 0x10 macro
Dgfx_8_1_sh_mask.h14940 #define SH_MEM_BASES__SHARED_BASE__SHIFT 0x10 macro
/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h2227 #define SH_MEM_BASES__SHARED_BASE__SHIFT … macro
Dgc_9_2_1_sh_mask.h2098 #define SH_MEM_BASES__SHARED_BASE__SHIFT … macro
Dgc_9_4_3_sh_mask.h2245 #define SH_MEM_BASES__SHARED_BASE__SHIFT … macro
Dgc_9_1_sh_mask.h2075 #define SH_MEM_BASES__SHARED_BASE__SHIFT … macro
Dgc_9_4_2_sh_mask.h25528 #define SH_MEM_BASES__SHARED_BASE__SHIFT … macro
Dgc_11_0_0_sh_mask.h24673 #define SH_MEM_BASES__SHARED_BASE__SHIFT … macro
Dgc_10_1_0_sh_mask.h7779 #define SH_MEM_BASES__SHARED_BASE__SHIFT … macro
Dgc_11_0_3_sh_mask.h27029 #define SH_MEM_BASES__SHARED_BASE__SHIFT … macro
Dgc_10_3_0_sh_mask.h8114 #define SH_MEM_BASES__SHARED_BASE__SHIFT … macro