Searched refs:SDMA0_PHASE0_QUANTUM__VALUE__SHIFT (Results 1 – 16 of 16) sorted by relevance
351 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT)) { in cik_ctx_switch_enable()358 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT); in cik_ctx_switch_enable()366 value << SDMA0_PHASE0_QUANTUM__VALUE__SHIFT | in cik_ctx_switch_enable()
558 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT)) { in sdma_v3_0_ctx_switch_enable()565 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT); in sdma_v3_0_ctx_switch_enable()573 value << SDMA0_PHASE0_QUANTUM__VALUE__SHIFT | in sdma_v3_0_ctx_switch_enable()
409 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT)) { in sdma_v5_2_ctx_switch_enable()416 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT); in sdma_v5_2_ctx_switch_enable()424 value << SDMA0_PHASE0_QUANTUM__VALUE__SHIFT | in sdma_v5_2_ctx_switch_enable()
604 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT)) { in sdma_v5_0_ctx_switch_enable()611 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT); in sdma_v5_0_ctx_switch_enable()619 value << SDMA0_PHASE0_QUANTUM__VALUE__SHIFT | in sdma_v5_0_ctx_switch_enable()
946 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT)) { in sdma_v4_0_ctx_switch_enable()953 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT); in sdma_v4_0_ctx_switch_enable()961 value << SDMA0_PHASE0_QUANTUM__VALUE__SHIFT | in sdma_v4_0_ctx_switch_enable()
596 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT … macro
597 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro
605 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT … macro
599 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT … macro
1104 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro
1014 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro
1124 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro
1630 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro
292 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT … macro
311 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT … macro
312 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT … macro
