Searched refs:SDHC_MMCM_DIV_REG (Results 1 – 1 of 1) sorted by relevance
23 #define SDHC_MMCM_DIV_REG 0x1020 macro53 sdhci_writel(host, DIV_REG_100_MHZ, SDHC_MMCM_DIV_REG); in sdhci_snps_set_clock()57 sdhci_writel(host, DIV_REG_200_MHZ, SDHC_MMCM_DIV_REG); in sdhci_snps_set_clock()
