Searched refs:SDHCI_CTRL_DMA_MASK (Results 1 – 5 of 5) sorted by relevance
73 u8 dma_bits = (val & SDHCI_CTRL_DMA_MASK) >> 3; in esdhc_mcf_writeb_be()131 u8 dma_bits = (val >> 5) & SDHCI_CTRL_DMA_MASK; in esdhc_mcf_readb_be()134 host_ctrl &= ~SDHCI_CTRL_DMA_MASK; in esdhc_mcf_readb_be()
215 dma_bits = (value >> 5) & SDHCI_CTRL_DMA_MASK; in esdhc_readb_fixup()217 ret &= ~SDHCI_CTRL_DMA_MASK; in esdhc_readb_fixup()318 dma_bits = (value & SDHCI_CTRL_DMA_MASK) << 5; in esdhc_writeb_fixup()319 ret = (old_value & (~(SDHCI_CTRL_DMA_MASK << 5))) | dma_bits; in esdhc_writeb_fixup()320 tmp = (value & (~SDHCI_CTRL_DMA_MASK)) | in esdhc_writeb_fixup()321 (old_value & SDHCI_CTRL_DMA_MASK); in esdhc_writeb_fixup()
771 ctrl &= ~SDHCI_CTRL_DMA_MASK; in esdhc_writew_le()819 ret |= (val >> 5) & SDHCI_CTRL_DMA_MASK; in esdhc_readb_le()850 new_val |= (val & SDHCI_CTRL_DMA_MASK) << 5; in esdhc_writeb_le()
87 #define SDHCI_CTRL_DMA_MASK 0x18 macro
328 ctrl &= ~SDHCI_CTRL_DMA_MASK; in sdhci_config_dma()3906 ctrl &= ~SDHCI_CTRL_DMA_MASK; in sdhci_cqe_enable()
