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Searched refs:RIRB_STATUS__RESPONSE_INTERRUPT_MASK (Results 1 – 14 of 14) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_8_0_sh_mask.h11517 #define RIRB_STATUS__RESPONSE_INTERRUPT_MASK 0x1 macro
Ddce_10_0_sh_mask.h12619 #define RIRB_STATUS__RESPONSE_INTERRUPT_MASK 0x1 macro
Ddce_11_0_sh_mask.h12625 #define RIRB_STATUS__RESPONSE_INTERRUPT_MASK 0x1 macro
Ddce_11_2_sh_mask.h13241 #define RIRB_STATUS__RESPONSE_INTERRUPT_MASK 0x1 macro
Ddce_12_0_sh_mask.h56095 #define RIRB_STATUS__RESPONSE_INTERRUPT_MASK … macro
/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_sh_mask.h27124 #define RIRB_STATUS__RESPONSE_INTERRUPT_MASK … macro
Ddcn_3_0_1_sh_mask.h236 #define RIRB_STATUS__RESPONSE_INTERRUPT_MASK … macro
Ddcn_3_2_1_sh_mask.h47864 #define RIRB_STATUS__RESPONSE_INTERRUPT_MASK … macro
Ddcn_1_0_sh_mask.h968 #define RIRB_STATUS__RESPONSE_INTERRUPT_MASK … macro
Ddcn_3_1_5_sh_mask.h51060 #define RIRB_STATUS__RESPONSE_INTERRUPT_MASK … macro
Ddcn_3_0_2_sh_mask.h54171 #define RIRB_STATUS__RESPONSE_INTERRUPT_MASK … macro
Ddcn_3_0_0_sh_mask.h62749 #define RIRB_STATUS__RESPONSE_INTERRUPT_MASK … macro
Ddcn_2_0_0_sh_mask.h59167 #define RIRB_STATUS__RESPONSE_INTERRUPT_MASK … macro
Ddcn_3_2_0_sh_mask.h47866 #define RIRB_STATUS__RESPONSE_INTERRUPT_MASK … macro