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Searched refs:REG_SET_FLD_NUM (Results 1 – 3 of 3) sorted by relevance

/Linux-v6.6/drivers/accel/ivpu/
Divpu_hw_40xx.c168 val = REG_SET_FLD_NUM(VPU_40XX_BUTTRESS_WP_REQ_PAYLOAD0, MIN_RATIO, min_ratio, val); in ivpu_pll_cmd_send()
169 val = REG_SET_FLD_NUM(VPU_40XX_BUTTRESS_WP_REQ_PAYLOAD0, MAX_RATIO, max_ratio, val); in ivpu_pll_cmd_send()
173 val = REG_SET_FLD_NUM(VPU_40XX_BUTTRESS_WP_REQ_PAYLOAD1, TARGET_RATIO, target_ratio, val); in ivpu_pll_cmd_send()
174 val = REG_SET_FLD_NUM(VPU_40XX_BUTTRESS_WP_REQ_PAYLOAD1, EPP, epp, val); in ivpu_pll_cmd_send()
178 val = REG_SET_FLD_NUM(VPU_40XX_BUTTRESS_WP_REQ_PAYLOAD2, CONFIG, config, val); in ivpu_pll_cmd_send()
179 val = REG_SET_FLD_NUM(VPU_40XX_BUTTRESS_WP_REQ_PAYLOAD2, CDYN, cdyn, val); in ivpu_pll_cmd_send()
719 hw->sku = REG_SET_FLD_NUM(SKU, HW_ID, LNL_HW_ID, hw->sku); in ivpu_hw_40xx_info_init()
720 hw->sku = REG_SET_FLD_NUM(SKU, TILE, tile_enable, hw->sku); in ivpu_hw_40xx_info_init()
Divpu_hw_37xx.c143 val = REG_SET_FLD_NUM(VPU_37XX_BUTTRESS_WP_REQ_PAYLOAD0, MIN_RATIO, min_ratio, val); in ivpu_pll_cmd_send()
144 val = REG_SET_FLD_NUM(VPU_37XX_BUTTRESS_WP_REQ_PAYLOAD0, MAX_RATIO, max_ratio, val); in ivpu_pll_cmd_send()
148 val = REG_SET_FLD_NUM(VPU_37XX_BUTTRESS_WP_REQ_PAYLOAD1, TARGET_RATIO, target_ratio, val); in ivpu_pll_cmd_send()
149 val = REG_SET_FLD_NUM(VPU_37XX_BUTTRESS_WP_REQ_PAYLOAD1, EPP, PLL_DEFAULT_EPP_VALUE, val); in ivpu_pll_cmd_send()
153 val = REG_SET_FLD_NUM(VPU_37XX_BUTTRESS_WP_REQ_PAYLOAD2, CONFIG, config, val); in ivpu_pll_cmd_send()
Divpu_hw_reg_io.h43 #define REG_SET_FLD_NUM(REG, FLD, num, val) \ macro