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Searched refs:REG_PTR (Results 1 – 3 of 3) sorted by relevance

/Linux-v6.6/arch/riscv/kernel/
Dtraps_misaligned.c132 #define REG_PTR(insn, pos, regs) \ macro
137 #define GET_RS1(insn, regs) (*REG_PTR(insn, SH_RS1, regs))
138 #define GET_RS2(insn, regs) (*REG_PTR(insn, SH_RS2, regs))
139 #define GET_RS1S(insn, regs) (*REG_PTR(RVC_RS1S(insn), 0, regs))
140 #define GET_RS2S(insn, regs) (*REG_PTR(RVC_RS2S(insn), 0, regs))
141 #define GET_RS2C(insn, regs) (*REG_PTR(insn, SH_RS2C, regs))
142 #define GET_SP(regs) (*REG_PTR(2, 0, regs))
143 #define SET_RD(insn, regs, val) (*REG_PTR(insn, SH_RD, regs) = (val))
/Linux-v6.6/arch/riscv/kvm/
Dvcpu_insn.c118 #define REG_PTR(insn, pos, regs) \ macro
123 #define GET_RS1(insn, regs) (*REG_PTR(insn, SH_RS1, regs))
124 #define GET_RS2(insn, regs) (*REG_PTR(insn, SH_RS2, regs))
125 #define GET_RS1S(insn, regs) (*REG_PTR(RVC_RS1S(insn), 0, regs))
126 #define GET_RS2S(insn, regs) (*REG_PTR(RVC_RS2S(insn), 0, regs))
127 #define GET_RS2C(insn, regs) (*REG_PTR(insn, SH_RS2C, regs))
128 #define GET_SP(regs) (*REG_PTR(2, 0, regs))
129 #define SET_RD(insn, regs, val) (*REG_PTR(insn, SH_RD, regs) = (val))
/Linux-v6.6/arch/alpha/kernel/
Dpc873xx.h11 #define REG_PTR 0x02 macro