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Searched refs:REG_OFDM0_TRX_PATH_ENABLE (Results 1 – 8 of 8) sorted by relevance

/Linux-v6.6/drivers/net/wireless/realtek/rtl8xxxu/
Drtl8xxxu_8192f.c829 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, 0x6f005403); in rtl8192fu_iqk_path_a()
986 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, 0x6f005403); in rtl8192fu_rx_iqk_path_a()
1053 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, 0x6f005403); in rtl8192fu_iqk_path_b()
1151 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, 0x6f005403); in rtl8192fu_rx_iqk_path_b()
1215 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, 0x6f005403); in rtl8192fu_rx_iqk_path_b()
1282 REG_OFDM0_TRX_PATH_ENABLE, REG_OFDM0_TR_MUX_PAR, in rtl8192fu_phy_iqcalibrate()
1429 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, 0x6f005433); in rtl8192fu_phy_iqcalibrate()
1921 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE); in rtl8192f_enable_rf()
1925 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, val32); in rtl8192f_enable_rf()
1934 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE); in rtl8192f_disable_rf()
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Drtl8xxxu_8188f.c1085 REG_OFDM0_TRX_PATH_ENABLE, REG_OFDM0_TR_MUX_PAR, in rtl8188fu_phy_iqcalibrate()
1119 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, 0x03a05600); in rtl8188fu_phy_iqcalibrate()
1614 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE); in rtl8188f_enable_rf()
1617 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, val32); in rtl8188f_enable_rf()
1626 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE); in rtl8188f_disable_rf()
1628 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, val32); in rtl8188f_disable_rf()
Drtl8xxxu_8710b.c1293 REG_OFDM0_TRX_PATH_ENABLE, REG_OFDM0_TR_MUX_PAR, in rtl8710bu_phy_iqcalibrate()
1342 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, 0x03a05601); in rtl8710bu_phy_iqcalibrate()
1743 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE); in rtl8710b_enable_rf()
1746 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, val32); in rtl8710b_enable_rf()
1755 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE); in rtl8710b_disable_rf()
1757 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, val32); in rtl8710b_disable_rf()
Drtl8xxxu_8188e.c788 REG_OFDM0_TRX_PATH_ENABLE, REG_OFDM0_TR_MUX_PAR, in rtl8188eu_phy_iqcalibrate()
828 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, 0x03a05600); in rtl8188eu_phy_iqcalibrate()
1284 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE); in rtl8188e_enable_rf()
1287 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, val32); in rtl8188e_enable_rf()
1296 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE); in rtl8188e_disable_rf()
1298 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, val32); in rtl8188e_disable_rf()
Drtl8xxxu_8192e.c1088 REG_OFDM0_TRX_PATH_ENABLE, REG_OFDM0_TR_MUX_PAR, in rtl8192eu_phy_iqcalibrate()
1119 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, 0x03a05600); in rtl8192eu_phy_iqcalibrate()
Drtl8xxxu_8723b.c932 REG_OFDM0_TRX_PATH_ENABLE, REG_OFDM0_TR_MUX_PAR, in rtl8723bu_phy_iqcalibrate()
963 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, 0x03a05600); in rtl8723bu_phy_iqcalibrate()
Drtl8xxxu_core.c1110 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE); in rtl8xxxu_gen1_enable_rf()
1118 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, val32); in rtl8xxxu_gen1_enable_rf()
1151 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE); in rtl8xxxu_gen1_disable_rf()
1153 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, val32); in rtl8xxxu_gen1_disable_rf()
2356 val32 = rtl8xxxu_read32(priv, REG_OFDM0_TRX_PATH_ENABLE); in rtl8xxxu_init_phy_bb()
2360 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, val32); in rtl8xxxu_init_phy_bb()
3221 REG_OFDM0_TRX_PATH_ENABLE, REG_OFDM0_TR_MUX_PAR, in rtl8xxxu_phy_iqcalibrate()
3259 rtl8xxxu_write32(priv, REG_OFDM0_TRX_PATH_ENABLE, 0x03a05600); in rtl8xxxu_phy_iqcalibrate()
Drtl8xxxu_regs.h1041 #define REG_OFDM0_TRX_PATH_ENABLE 0x0c04 macro