Searched refs:REG_MHL_PLL_CTL0 (Results 1 – 2 of 2) sorted by relevance
974 REG_MHL_PLL_CTL0, VAL_MHL_PLL_CTL0_HDMI_CLK_RATIO_1X in sii8620_set_auto_zone()981 REG_MHL_PLL_CTL0, VAL_MHL_PLL_CTL0_HDMI_CLK_RATIO_1X in sii8620_set_auto_zone()1253 REG_MHL_PLL_CTL0, VAL_MHL_PLL_CTL0_HDMI_CLK_RATIO_1X in sii8620_mhl_discover()1529 REG_MHL_PLL_CTL0, 0x07, in sii8620_disconnect()1535 REG_MHL_PLL_CTL0, VAL_MHL_PLL_CTL0_HDMI_CLK_RATIO_1X in sii8620_disconnect()
749 #define REG_MHL_PLL_CTL0 0x0337 macro
