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Searched refs:REGV_WR64 (Results 1 – 4 of 4) sorted by relevance

/Linux-v6.6/drivers/accel/ivpu/
Divpu_hw_40xx.c638 REGV_WR64(VPU_40XX_HOST_SS_VERIFICATION_ADDRESS_LO, val64); in ivpu_boot_soc_cpu_boot()
982 REGV_WR64(VPU_40XX_HOST_SS_ICB_CLEAR_0, ICB_0_1_IRQ_MASK); in ivpu_hw_40xx_irq_clear()
988 REGV_WR64(VPU_40XX_HOST_SS_ICB_ENABLE_0, ICB_0_1_IRQ_MASK); in ivpu_hw_40xx_irq_enable()
997 REGV_WR64(VPU_40XX_HOST_SS_ICB_ENABLE_0, 0x0ull); in ivpu_hw_40xx_irq_disable()
Divpu_mmu.c510 REGV_WR64(VPU_37XX_HOST_MMU_STRTAB_BASE, mmu->strtab.dma_q); in ivpu_mmu_reset()
513 REGV_WR64(VPU_37XX_HOST_MMU_CMDQ_BASE, mmu->cmdq.dma_q); in ivpu_mmu_reset()
534 REGV_WR64(VPU_37XX_HOST_MMU_EVTQ_BASE, mmu->evtq.dma_q); in ivpu_mmu_reset()
Divpu_hw_reg_io.h28 #define REGV_WR64(reg, val) ivpu_hw_reg_wr64(vdev, vdev->regv, (reg), (val), #reg, __func__) macro
Divpu_hw_37xx.c862 REGV_WR64(VPU_37XX_HOST_SS_ICB_CLEAR_0, ICB_0_1_IRQ_MASK); in ivpu_hw_37xx_irq_clear()
868 REGV_WR64(VPU_37XX_HOST_SS_ICB_ENABLE_0, ICB_0_1_IRQ_MASK); in ivpu_hw_37xx_irq_enable()
877 REGV_WR64(VPU_37XX_HOST_SS_ICB_ENABLE_0, 0x0ull); in ivpu_hw_37xx_irq_disable()