Home
last modified time | relevance | path

Searched refs:R9A07G044_CLK_P1 (Results 1 – 2 of 2) sorted by relevance

/Linux-v6.6/drivers/clk/renesas/
Dr9a07g044-cpg.c158 DEF_DIV("P1", R9A07G044_CLK_P1, CLK_PLL3_DIV2_4, DIVPL3B, dtable_1_32),
159 DEF_FIXED("P1_DIV2", CLK_P1_DIV2, R9A07G044_CLK_P1, 1, 2),
191 DEF_MOD("gic", R9A07G044_GIC600_GICCLK, R9A07G044_CLK_P1,
195 DEF_MOD("ia55_clk", R9A07G044_IA55_CLK, R9A07G044_CLK_P1,
197 DEF_MOD("dmac_aclk", R9A07G044_DMAC_ACLK, R9A07G044_CLK_P1,
237 DEF_MOD("sdhi0_aclk", R9A07G044_SDHI0_ACLK, R9A07G044_CLK_P1,
245 DEF_MOD("sdhi1_aclk", R9A07G044_SDHI1_ACLK, R9A07G044_CLK_P1,
249 DEF_MOD("gpu_axi_clk", R9A07G044_GPU_AXI_CLK, R9A07G044_CLK_P1,
251 DEF_MOD("gpu_ace_clk", R9A07G044_GPU_ACE_CLK, R9A07G044_CLK_P1,
265 DEF_MOD("dsi_aclk", R9A07G044_MIPI_DSI_ACLK, R9A07G044_CLK_P1,
[all …]
/Linux-v6.6/include/dt-bindings/clock/
Dr9a07g044-cpg.h29 #define R9A07G044_CLK_P1 18 macro