Searched refs:QSPI (Results 1 – 25 of 30) sorted by relevance
12
153 label = "QSPI.SPL";157 label = "QSPI.SPL.backup1";161 label = "QSPI.SPL.backup2";165 label = "QSPI.SPL.backup3";169 label = "QSPI.u-boot";173 label = "QSPI.u-boot-spl-os";177 label = "QSPI.u-boot-env";181 label = "QSPI.u-boot-env.backup1";185 label = "QSPI.kernel";189 label = "QSPI.file-system";
492 label = "QSPI.SPL";496 label = "QSPI.SPL.backup1";500 label = "QSPI.SPL.backup2";504 label = "QSPI.SPL.backup3";508 label = "QSPI.u-boot";512 label = "QSPI.u-boot-spl-os";516 label = "QSPI.u-boot-env";520 label = "QSPI.u-boot-env.backup1";524 label = "QSPI.kernel";528 label = "QSPI.file-system";
544 label = "QSPI.SPL";548 label = "QSPI.u-boot";552 label = "QSPI.u-boot-spl-os";556 label = "QSPI.u-boot-env";560 label = "QSPI.u-boot-env.backup1";564 label = "QSPI.kernel";568 label = "QSPI.file-system";
454 label = "QSPI.U_BOOT";458 label = "QSPI.U_BOOT.backup";462 label = "QSPI.U-BOOT-SPL_OS";466 label = "QSPI.U_BOOT_ENV";470 label = "QSPI.U-BOOT-ENV.backup";474 label = "QSPI.KERNEL";478 label = "QSPI.FILESYSTEM";
750 status = "okay"; /* Disable QSPI when enabling GPMC (NAND) */899 status = "disabled"; /* Disable GPMC (NAND) when enabling QSPI */921 label = "QSPI.U_BOOT";925 label = "QSPI.U_BOOT.backup";929 label = "QSPI.U-BOOT-SPL_OS";933 label = "QSPI.U_BOOT_ENV";937 label = "QSPI.U-BOOT-ENV.backup";941 label = "QSPI.KERNEL";945 label = "QSPI.FILESYSTEM";
765 label = "QSPI.U_BOOT";769 label = "QSPI.U_BOOT.backup";773 label = "QSPI.U-BOOT-SPL_OS";777 label = "QSPI.U_BOOT_ENV";781 label = "QSPI.U-BOOT-ENV.backup";785 label = "QSPI.KERNEL";789 label = "QSPI.FILESYSTEM";
1 TI QSPI controller.5 - reg: Should contain QSPI registers location and length.12 - ti,hwmods: Name of the hwmod associated to the QSPI19 - syscon-chipselects: Handle to system control region contains QSPI22 NOTE: TI QSPI controller requires different pinmux and IODelay26 specified in the slave nodes of TI QSPI controller without appropriate
343 label = "QSPI.u-boot";347 label = "QSPI.u-boot-env";351 label = "QSPI.skern";355 label = "QSPI.pmmc-firmware";359 label = "QSPI.kernel";363 label = "QSPI.u-boot-spl-os";367 label = "QSPI.file-system";
410 label = "QSPI.u-boot-spl-os";414 label = "QSPI.u-boot-env";418 label = "QSPI.skern";422 label = "QSPI.pmmc-firmware";426 label = "QSPI.kernel";430 label = "QSPI.file-system";
253 Cadence QSPI is a specialized controller for connecting an SPI255 device with a Cadence QSPI controller and want to access the278 tristate "Freescale Coldfire QSPI controller"281 This enables support for the Coldfire QSPI controller in master386 tristate "Freescale QSPI controller"645 tristate "Microchip FPGA QSPI controllers"648 This enables the QSPI driver for Microchip FPGA QSPI controllers.649 Say Y or M here if you want to use the QSPI controllers on754 tristate "DRA7xxx QSPI controller support"757 QSPI master controller for DRA7xxx used for flash devices.[all …]
20 - QSPI
14 - Dual mode QSPI
338 QSPI, enumerator430 INTC_VECT(QSPI, 0xE60),438 INTC_GROUP(SPI, HSPI, RSPI, QSPI),
39 /* GP0_18 set low to select QSPI. Doing so will disable VIN2 */
120 #define QSPI 107 macro
17 the services for FPGA configuration, QSPI, Crypto and warm reset. Service layer
1386 …PINGROUP(qspi_sck_pee0, QSPI, RSVD1, RSVD2, RSVD3, 0x3088, Y, Y, N, N,…1387 …PINGROUP(qspi_cs_n_pee1, QSPI, RSVD1, RSVD2, RSVD3, 0x308c, Y, Y, N, N,…1388 …PINGROUP(qspi_io0_pee2, QSPI, RSVD1, RSVD2, RSVD3, 0x3090, Y, Y, N, N,…1389 …PINGROUP(qspi_io1_pee3, QSPI, RSVD1, RSVD2, RSVD3, 0x3094, Y, Y, N, N,…1390 …PINGROUP(qspi_io2_pee4, QSPI, RSVD1, RSVD2, RSVD3, 0x3098, Y, Y, N, N,…1391 …PINGROUP(qspi_io3_pee5, QSPI, RSVD1, RSVD2, RSVD3, 0x309c, Y, Y, N, N,…
23 /* Configured as pullup by QSPI pin group */
117 QSPI FIFO ECC121 - altr,ecc-parent : phandle to parent QSPI node.
133 /* 1.8 V for QSPI NOR, e-MMC IO, must not be changed */
102 #define QSPI (0x3008) macro565 pwr_reg = QSPI; in rzg2l_pinctrl_pinconf_get()665 pwr_reg = QSPI; in rzg2l_pinctrl_pinconf_set()
