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Searched refs:PWRSEQ0_BL_PWM_CNTL__BL_PWM_EN_MASK (Results 1 – 8 of 8) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/dpcs/
Ddpcs_3_1_4_sh_mask.h54989 #define PWRSEQ0_BL_PWM_CNTL__BL_PWM_EN_MASK … macro
Ddpcs_4_2_0_sh_mask.h204 #define PWRSEQ0_BL_PWM_CNTL__BL_PWM_EN_MASK … macro
Ddpcs_4_2_2_sh_mask.h191 #define PWRSEQ0_BL_PWM_CNTL__BL_PWM_EN_MASK … macro
Ddpcs_4_2_3_sh_mask.h208 #define PWRSEQ0_BL_PWM_CNTL__BL_PWM_EN_MASK … macro
/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_1_5_sh_mask.h44665 #define PWRSEQ0_BL_PWM_CNTL__BL_PWM_EN_MASK … macro
Ddcn_3_1_2_sh_mask.h46388 #define PWRSEQ0_BL_PWM_CNTL__BL_PWM_EN_MASK … macro
Ddcn_3_1_4_sh_mask.h48693 #define PWRSEQ0_BL_PWM_CNTL__BL_PWM_EN_MASK … macro
Ddcn_3_1_6_sh_mask.h48011 #define PWRSEQ0_BL_PWM_CNTL__BL_PWM_EN_MASK … macro