Searched refs:PSR_MODE32_BIT (Results 1 – 13 of 13) sorted by relevance
244 mode = regs->pstate & (PSR_MODE32_BIT | PSR_MODE_MASK); in do_sdei_event()263 else if (mode & PSR_MODE32_BIT) in do_sdei_event()
2256 if (user_mode(regs) && (regs->pstate & PSR_MODE32_BIT) && in valid_compat_regs()2272 regs->pstate |= PSR_MODE32_BIT; in valid_compat_regs()2281 if (user_mode(regs) && !(regs->pstate & PSR_MODE32_BIT) && in valid_native_regs()
367 tst x22, #PSR_MODE32_BIT // native task?
172 u64 mode = ctxt->regs.pstate & (PSR_MODE_MASK | PSR_MODE32_BIT); in to_hw_pstate()183 return (ctxt->regs.pstate & ~(PSR_MODE_MASK | PSR_MODE32_BIT)) | mode; in to_hw_pstate()202 if (!(mode & PSR_MODE32_BIT) && mode >= PSR_MODE_EL2t) in __sysreg_restore_el2_return_state()
19 uc->uc_mcontext.pstate ^= PSR_MODE32_BIT; in mangle_invalid_pstate_run()
231 (((regs)->pstate & (PSR_MODE32_BIT | PSR_MODE_MASK)) == \232 (PSR_MODE32_BIT | PSR_MODE_EL0t))
159 return !!(*vcpu_cpsr(vcpu) & PSR_MODE32_BIT); in vcpu_mode_is_32bit()195 switch (ctxt->regs.pstate & (PSR_MODE32_BIT | PSR_MODE_MASK)) { in vcpu_is_el2_ctxt()
187 u64 mode = *vcpu_cpsr(vcpu) & (PSR_MODE_MASK | PSR_MODE32_BIT); in early_exit_filter()198 *vcpu_cpsr(vcpu) &= ~(PSR_MODE_MASK | PSR_MODE32_BIT); in early_exit_filter()
97 mode = *vcpu_cpsr(vcpu) & (PSR_MODE_MASK | PSR_MODE32_BIT); in enter_exception64()103 else if (!(mode & PSR_MODE32_BIT)) in enter_exception64()
326 __entry->target_mode = spsr_el2 & (PSR_MODE_MASK | PSR_MODE32_BIT);356 __entry->source_mode = *vcpu_cpsr(vcpu) & (PSR_MODE_MASK | PSR_MODE32_BIT);
1884 (spsr & PSR_MODE32_BIT) || in kvm_check_illegal_exception_return()1897 PSR_MODE_MASK | PSR_MODE32_BIT); in kvm_check_illegal_exception_return()1919 mode = spsr & (PSR_MODE_MASK | PSR_MODE32_BIT); in kvm_emulate_nested_eret()1993 mode = pstate & (PSR_MODE_MASK | PSR_MODE32_BIT); in kvm_inject_nested()
276 if (*vcpu_cpsr(vcpu) & PSR_MODE32_BIT) { in set_core_reg()
42 #define PSR_MODE32_BIT 0x00000010 macro
