Searched refs:PLL_HPLL (Results 1 – 20 of 20) sorted by relevance
| /Linux-v6.6/arch/arm64/boot/dts/rockchip/ |
| D | rk3566-radxa-cm3-io.dts | 267 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
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| D | rk3568-fastrhino-r66s.dtsi | 474 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
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| D | rk3566-box-demo.dts | 469 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
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| D | rk3566-lubancat-1.dts | 579 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
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| D | rk3568-nanopi-r5s.dtsi | 574 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
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| D | rk3568-roc-pc.dts | 637 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
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| D | rk3566-roc-pc.dts | 686 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
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| D | rk3566-soquartz.dtsi | 672 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
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| D | rk3568-lubancat-2.dts | 679 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
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| D | rk3568-evb1-v10.dts | 676 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
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| D | rk3568-odroid-m1.dts | 728 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
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| D | rk3566-anbernic-rgxx3.dtsi | 775 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
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| D | rk3566-quartz64-b.dts | 724 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
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| D | rk3568-bpi-r2-pro.dts | 839 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
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| D | rk3568-rock-3a.dts | 842 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
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| D | rk3566-quartz64-a.dts | 824 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
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| /Linux-v6.6/include/dt-bindings/clock/ |
| D | rockchip,rv1126-cru.h | 68 #define PLL_HPLL 4 macro
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| D | rk3568-cru.h | 14 #define PLL_HPLL 2 macro
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| /Linux-v6.6/drivers/clk/rockchip/ |
| D | clk-rv1126.c | 206 [hpll] = PLL(pll_rk3328, PLL_HPLL, "hpll", mux_pll_p,
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| D | clk-rk3568.c | 316 [hpll] = PLL(pll_rk3328, PLL_HPLL, "hpll", mux_pll_p,
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