| /Linux-v6.6/include/dt-bindings/clock/ |
| D | rk3036-cru.h | 13 #define PLL_GPLL 3 macro
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| D | rk3188-cru-common.h | 14 #define PLL_GPLL 4 macro
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| D | rk3128-cru.h | 14 #define PLL_GPLL 4 macro
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| D | rk3228-cru.h | 14 #define PLL_GPLL 4 macro
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| D | rv1108-cru.h | 13 #define PLL_GPLL 2 macro
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| D | px30-cru.h | 182 #define PLL_GPLL 1 macro
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| D | rk3288-cru.h | 14 #define PLL_GPLL 4 macro
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| D | rk3328-cru.h | 14 #define PLL_GPLL 4 macro
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| D | rk3368-cru.h | 14 #define PLL_GPLL 5 macro
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| D | rockchip,rv1126-cru.h | 13 #define PLL_GPLL 1 macro
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| D | rk3399-cru.h | 15 #define PLL_GPLL 5 macro
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| D | rockchip,rk3588-cru.h | 21 #define PLL_GPLL 6 macro
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| D | rk3568-cru.h | 73 #define PLL_GPLL 4 macro
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| /Linux-v6.6/arch/arm64/boot/dts/rockchip/ |
| D | rk3566-anbernic-rg353x.dtsi | 19 assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>,
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| D | rk3566-anbernic-rg503.dts | 108 assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>,
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| D | rk3399-pinephone-pro.dts | 604 assigned-clock-parents = <&cru PLL_GPLL>, <&cru DCLK_VOP0_DIV>;
616 assigned-clock-parents = <&cru PLL_GPLL>, <&cru DCLK_VOP1_DIV>;
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| D | rk3399-gru-scarlet.dtsi | 368 <&cru PLL_GPLL>, <&cru PLL_CPLL>,
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| /Linux-v6.6/drivers/clk/rockchip/ |
| D | clk-rk3188.c | 222 [gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK2928_PLL_CON(12),
233 [gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK2928_PLL_CON(12),
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| D | clk-rk3036.c | 141 [gpll] = PLL(pll_rk3036, PLL_GPLL, "gpll", mux_pll_p, 0, RK2928_PLL_CON(12),
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| D | clk-rk3128.c | 165 [gpll] = PLL(pll_rk3036, PLL_GPLL, "gpll", mux_pll_p, 0, RK2928_PLL_CON(12),
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| D | clk-rk3228.c | 175 [gpll] = PLL(pll_rk3036, PLL_GPLL, "gpll", mux_pll_p, 0, RK2928_PLL_CON(9),
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| D | clk-rv1108.c | 158 [gpll] = PLL(pll_rk3399, PLL_GPLL, "gpll", mux_pll_p, 0, RV1108_PLL_CON(16),
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| D | clk-rk3328.c | 224 [gpll] = PLL(pll_rk3328, PLL_GPLL, "gpll", mux_pll_p,
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| D | clk-rk3368.c | 138 [gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK3368_PLL_CON(16),
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| /Linux-v6.6/arch/arm/boot/dts/rockchip/ |
| D | rk3188-bqedison2qc.dts | 227 assigned-clocks = <&cru PLL_GPLL>, <&cru PLL_CPLL>,
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