1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2023 Advanced Micro Devices, Inc */
3
4 #ifndef _PDS_CORE_ADMINQ_H_
5 #define _PDS_CORE_ADMINQ_H_
6
7 #define PDSC_ADMINQ_MAX_POLL_INTERVAL 256
8
9 enum pds_core_adminq_flags {
10 PDS_AQ_FLAG_FASTPOLL = BIT(1), /* completion poll at 1ms */
11 };
12
13 /*
14 * enum pds_core_adminq_opcode - AdminQ command opcodes
15 * These commands are only processed on AdminQ, not available in devcmd
16 */
17 enum pds_core_adminq_opcode {
18 PDS_AQ_CMD_NOP = 0,
19
20 /* Client control */
21 PDS_AQ_CMD_CLIENT_REG = 6,
22 PDS_AQ_CMD_CLIENT_UNREG = 7,
23 PDS_AQ_CMD_CLIENT_CMD = 8,
24
25 /* LIF commands */
26 PDS_AQ_CMD_LIF_IDENTIFY = 20,
27 PDS_AQ_CMD_LIF_INIT = 21,
28 PDS_AQ_CMD_LIF_RESET = 22,
29 PDS_AQ_CMD_LIF_GETATTR = 23,
30 PDS_AQ_CMD_LIF_SETATTR = 24,
31 PDS_AQ_CMD_LIF_SETPHC = 25,
32
33 PDS_AQ_CMD_RX_MODE_SET = 30,
34 PDS_AQ_CMD_RX_FILTER_ADD = 31,
35 PDS_AQ_CMD_RX_FILTER_DEL = 32,
36
37 /* Queue commands */
38 PDS_AQ_CMD_Q_IDENTIFY = 39,
39 PDS_AQ_CMD_Q_INIT = 40,
40 PDS_AQ_CMD_Q_CONTROL = 41,
41
42 /* SR/IOV commands */
43 PDS_AQ_CMD_VF_GETATTR = 60,
44 PDS_AQ_CMD_VF_SETATTR = 61,
45 };
46
47 /*
48 * enum pds_core_notifyq_opcode - NotifyQ event codes
49 */
50 enum pds_core_notifyq_opcode {
51 PDS_EVENT_LINK_CHANGE = 1,
52 PDS_EVENT_RESET = 2,
53 PDS_EVENT_XCVR = 5,
54 PDS_EVENT_CLIENT = 6,
55 };
56
57 #define PDS_COMP_COLOR_MASK 0x80
58
59 /**
60 * struct pds_core_notifyq_event - Generic event reporting structure
61 * @eid: event number
62 * @ecode: event code
63 *
64 * This is the generic event report struct from which the other
65 * actual events will be formed.
66 */
67 struct pds_core_notifyq_event {
68 __le64 eid;
69 __le16 ecode;
70 };
71
72 /**
73 * struct pds_core_link_change_event - Link change event notification
74 * @eid: event number
75 * @ecode: event code = PDS_EVENT_LINK_CHANGE
76 * @link_status: link up/down, with error bits
77 * @link_speed: speed of the network link
78 *
79 * Sent when the network link state changes between UP and DOWN
80 */
81 struct pds_core_link_change_event {
82 __le64 eid;
83 __le16 ecode;
84 __le16 link_status;
85 __le32 link_speed; /* units of 1Mbps: e.g. 10000 = 10Gbps */
86 };
87
88 /**
89 * struct pds_core_reset_event - Reset event notification
90 * @eid: event number
91 * @ecode: event code = PDS_EVENT_RESET
92 * @reset_code: reset type
93 * @state: 0=pending, 1=complete, 2=error
94 *
95 * Sent when the NIC or some subsystem is going to be or
96 * has been reset.
97 */
98 struct pds_core_reset_event {
99 __le64 eid;
100 __le16 ecode;
101 u8 reset_code;
102 u8 state;
103 };
104
105 /**
106 * struct pds_core_client_event - Client event notification
107 * @eid: event number
108 * @ecode: event code = PDS_EVENT_CLIENT
109 * @client_id: client to sent event to
110 * @client_event: wrapped event struct for the client
111 *
112 * Sent when an event needs to be passed on to a client
113 */
114 struct pds_core_client_event {
115 __le64 eid;
116 __le16 ecode;
117 __le16 client_id;
118 u8 client_event[54];
119 };
120
121 /**
122 * struct pds_core_notifyq_cmd - Placeholder for building qcq
123 * @data: anonymous field for building the qcq
124 */
125 struct pds_core_notifyq_cmd {
126 __le32 data; /* Not used but needed for qcq structure */
127 };
128
129 /*
130 * union pds_core_notifyq_comp - Overlay of notifyq event structures
131 */
132 union pds_core_notifyq_comp {
133 struct {
134 __le64 eid;
135 __le16 ecode;
136 };
137 struct pds_core_notifyq_event event;
138 struct pds_core_link_change_event link_change;
139 struct pds_core_reset_event reset;
140 u8 data[64];
141 };
142
143 #define PDS_DEVNAME_LEN 32
144 /**
145 * struct pds_core_client_reg_cmd - Register a new client with DSC
146 * @opcode: opcode PDS_AQ_CMD_CLIENT_REG
147 * @rsvd: word boundary padding
148 * @devname: text name of client device
149 * @vif_type: what type of device (enum pds_core_vif_types)
150 *
151 * Tell the DSC of the new client, and receive a client_id from DSC.
152 */
153 struct pds_core_client_reg_cmd {
154 u8 opcode;
155 u8 rsvd[3];
156 char devname[PDS_DEVNAME_LEN];
157 u8 vif_type;
158 };
159
160 /**
161 * struct pds_core_client_reg_comp - Client registration completion
162 * @status: Status of the command (enum pdc_core_status_code)
163 * @rsvd: Word boundary padding
164 * @comp_index: Index in the descriptor ring for which this is the completion
165 * @client_id: New id assigned by DSC
166 * @rsvd1: Word boundary padding
167 * @color: Color bit
168 */
169 struct pds_core_client_reg_comp {
170 u8 status;
171 u8 rsvd;
172 __le16 comp_index;
173 __le16 client_id;
174 u8 rsvd1[9];
175 u8 color;
176 };
177
178 /**
179 * struct pds_core_client_unreg_cmd - Unregister a client from DSC
180 * @opcode: opcode PDS_AQ_CMD_CLIENT_UNREG
181 * @rsvd: word boundary padding
182 * @client_id: id of client being removed
183 *
184 * Tell the DSC this client is going away and remove its context
185 * This uses the generic completion.
186 */
187 struct pds_core_client_unreg_cmd {
188 u8 opcode;
189 u8 rsvd;
190 __le16 client_id;
191 };
192
193 /**
194 * struct pds_core_client_request_cmd - Pass along a wrapped client AdminQ cmd
195 * @opcode: opcode PDS_AQ_CMD_CLIENT_CMD
196 * @rsvd: word boundary padding
197 * @client_id: id of client being removed
198 * @client_cmd: the wrapped client command
199 *
200 * Proxy post an adminq command for the client.
201 * This uses the generic completion.
202 */
203 struct pds_core_client_request_cmd {
204 u8 opcode;
205 u8 rsvd;
206 __le16 client_id;
207 u8 client_cmd[60];
208 };
209
210 #define PDS_CORE_MAX_FRAGS 16
211
212 #define PDS_CORE_QCQ_F_INITED BIT(0)
213 #define PDS_CORE_QCQ_F_SG BIT(1)
214 #define PDS_CORE_QCQ_F_INTR BIT(2)
215 #define PDS_CORE_QCQ_F_TX_STATS BIT(3)
216 #define PDS_CORE_QCQ_F_RX_STATS BIT(4)
217 #define PDS_CORE_QCQ_F_NOTIFYQ BIT(5)
218 #define PDS_CORE_QCQ_F_CMB_RINGS BIT(6)
219 #define PDS_CORE_QCQ_F_CORE BIT(7)
220
221 enum pds_core_lif_type {
222 PDS_CORE_LIF_TYPE_DEFAULT = 0,
223 };
224
225 #define PDS_CORE_IFNAMSIZ 16
226
227 /**
228 * enum pds_core_logical_qtype - Logical Queue Types
229 * @PDS_CORE_QTYPE_ADMINQ: Administrative Queue
230 * @PDS_CORE_QTYPE_NOTIFYQ: Notify Queue
231 * @PDS_CORE_QTYPE_RXQ: Receive Queue
232 * @PDS_CORE_QTYPE_TXQ: Transmit Queue
233 * @PDS_CORE_QTYPE_EQ: Event Queue
234 * @PDS_CORE_QTYPE_MAX: Max queue type supported
235 */
236 enum pds_core_logical_qtype {
237 PDS_CORE_QTYPE_ADMINQ = 0,
238 PDS_CORE_QTYPE_NOTIFYQ = 1,
239 PDS_CORE_QTYPE_RXQ = 2,
240 PDS_CORE_QTYPE_TXQ = 3,
241 PDS_CORE_QTYPE_EQ = 4,
242
243 PDS_CORE_QTYPE_MAX = 16 /* don't change - used in struct size */
244 };
245
246 /**
247 * union pds_core_lif_config - LIF configuration
248 * @state: LIF state (enum pds_core_lif_state)
249 * @rsvd: Word boundary padding
250 * @name: LIF name
251 * @rsvd2: Word boundary padding
252 * @features: LIF features active (enum pds_core_hw_features)
253 * @queue_count: Queue counts per queue-type
254 * @words: Full union buffer size
255 */
256 union pds_core_lif_config {
257 struct {
258 u8 state;
259 u8 rsvd[3];
260 char name[PDS_CORE_IFNAMSIZ];
261 u8 rsvd2[12];
262 __le64 features;
263 __le32 queue_count[PDS_CORE_QTYPE_MAX];
264 } __packed;
265 __le32 words[64];
266 };
267
268 /**
269 * struct pds_core_lif_status - LIF status register
270 * @eid: most recent NotifyQ event id
271 * @rsvd: full struct size
272 */
273 struct pds_core_lif_status {
274 __le64 eid;
275 u8 rsvd[56];
276 };
277
278 /**
279 * struct pds_core_lif_info - LIF info structure
280 * @config: LIF configuration structure
281 * @status: LIF status structure
282 */
283 struct pds_core_lif_info {
284 union pds_core_lif_config config;
285 struct pds_core_lif_status status;
286 };
287
288 /**
289 * struct pds_core_lif_identity - LIF identity information (type-specific)
290 * @features: LIF features (see enum pds_core_hw_features)
291 * @version: Identify structure version
292 * @hw_index: LIF hardware index
293 * @rsvd: Word boundary padding
294 * @max_nb_sessions: Maximum number of sessions supported
295 * @rsvd2: buffer padding
296 * @config: LIF config struct with features, q counts
297 */
298 struct pds_core_lif_identity {
299 __le64 features;
300 u8 version;
301 u8 hw_index;
302 u8 rsvd[2];
303 __le32 max_nb_sessions;
304 u8 rsvd2[120];
305 union pds_core_lif_config config;
306 };
307
308 /**
309 * struct pds_core_lif_identify_cmd - Get LIF identity info command
310 * @opcode: Opcode PDS_AQ_CMD_LIF_IDENTIFY
311 * @type: LIF type (enum pds_core_lif_type)
312 * @client_id: Client identifier
313 * @ver: Version of identify returned by device
314 * @rsvd: Word boundary padding
315 * @ident_pa: DMA address to receive identity info
316 *
317 * Firmware will copy LIF identity data (struct pds_core_lif_identity)
318 * into the buffer address given.
319 */
320 struct pds_core_lif_identify_cmd {
321 u8 opcode;
322 u8 type;
323 __le16 client_id;
324 u8 ver;
325 u8 rsvd[3];
326 __le64 ident_pa;
327 };
328
329 /**
330 * struct pds_core_lif_identify_comp - LIF identify command completion
331 * @status: Status of the command (enum pds_core_status_code)
332 * @ver: Version of identify returned by device
333 * @bytes: Bytes copied into the buffer
334 * @rsvd: Word boundary padding
335 * @color: Color bit
336 */
337 struct pds_core_lif_identify_comp {
338 u8 status;
339 u8 ver;
340 __le16 bytes;
341 u8 rsvd[11];
342 u8 color;
343 };
344
345 /**
346 * struct pds_core_lif_init_cmd - LIF init command
347 * @opcode: Opcode PDS_AQ_CMD_LIF_INIT
348 * @type: LIF type (enum pds_core_lif_type)
349 * @client_id: Client identifier
350 * @rsvd: Word boundary padding
351 * @info_pa: Destination address for LIF info (struct pds_core_lif_info)
352 */
353 struct pds_core_lif_init_cmd {
354 u8 opcode;
355 u8 type;
356 __le16 client_id;
357 __le32 rsvd;
358 __le64 info_pa;
359 };
360
361 /**
362 * struct pds_core_lif_init_comp - LIF init command completion
363 * @status: Status of the command (enum pds_core_status_code)
364 * @rsvd: Word boundary padding
365 * @hw_index: Hardware index of the initialized LIF
366 * @rsvd1: Word boundary padding
367 * @color: Color bit
368 */
369 struct pds_core_lif_init_comp {
370 u8 status;
371 u8 rsvd;
372 __le16 hw_index;
373 u8 rsvd1[11];
374 u8 color;
375 };
376
377 /**
378 * struct pds_core_lif_reset_cmd - LIF reset command
379 * Will reset only the specified LIF.
380 * @opcode: Opcode PDS_AQ_CMD_LIF_RESET
381 * @rsvd: Word boundary padding
382 * @client_id: Client identifier
383 */
384 struct pds_core_lif_reset_cmd {
385 u8 opcode;
386 u8 rsvd;
387 __le16 client_id;
388 };
389
390 /**
391 * enum pds_core_lif_attr - List of LIF attributes
392 * @PDS_CORE_LIF_ATTR_STATE: LIF state attribute
393 * @PDS_CORE_LIF_ATTR_NAME: LIF name attribute
394 * @PDS_CORE_LIF_ATTR_FEATURES: LIF features attribute
395 * @PDS_CORE_LIF_ATTR_STATS_CTRL: LIF statistics control attribute
396 */
397 enum pds_core_lif_attr {
398 PDS_CORE_LIF_ATTR_STATE = 0,
399 PDS_CORE_LIF_ATTR_NAME = 1,
400 PDS_CORE_LIF_ATTR_FEATURES = 4,
401 PDS_CORE_LIF_ATTR_STATS_CTRL = 6,
402 };
403
404 /**
405 * struct pds_core_lif_setattr_cmd - Set LIF attributes on the NIC
406 * @opcode: Opcode PDS_AQ_CMD_LIF_SETATTR
407 * @attr: Attribute type (enum pds_core_lif_attr)
408 * @client_id: Client identifier
409 * @state: LIF state (enum pds_core_lif_state)
410 * @name: The name string, 0 terminated
411 * @features: Features (enum pds_core_hw_features)
412 * @stats_ctl: Stats control commands (enum pds_core_stats_ctl_cmd)
413 * @rsvd: Command Buffer padding
414 */
415 struct pds_core_lif_setattr_cmd {
416 u8 opcode;
417 u8 attr;
418 __le16 client_id;
419 union {
420 u8 state;
421 char name[PDS_CORE_IFNAMSIZ];
422 __le64 features;
423 u8 stats_ctl;
424 u8 rsvd[60];
425 } __packed;
426 };
427
428 /**
429 * struct pds_core_lif_setattr_comp - LIF set attr command completion
430 * @status: Status of the command (enum pds_core_status_code)
431 * @rsvd: Word boundary padding
432 * @comp_index: Index in the descriptor ring for which this is the completion
433 * @features: Features (enum pds_core_hw_features)
434 * @rsvd2: Word boundary padding
435 * @color: Color bit
436 */
437 struct pds_core_lif_setattr_comp {
438 u8 status;
439 u8 rsvd;
440 __le16 comp_index;
441 union {
442 __le64 features;
443 u8 rsvd2[11];
444 } __packed;
445 u8 color;
446 };
447
448 /**
449 * struct pds_core_lif_getattr_cmd - Get LIF attributes from the NIC
450 * @opcode: Opcode PDS_AQ_CMD_LIF_GETATTR
451 * @attr: Attribute type (enum pds_core_lif_attr)
452 * @client_id: Client identifier
453 */
454 struct pds_core_lif_getattr_cmd {
455 u8 opcode;
456 u8 attr;
457 __le16 client_id;
458 };
459
460 /**
461 * struct pds_core_lif_getattr_comp - LIF get attr command completion
462 * @status: Status of the command (enum pds_core_status_code)
463 * @rsvd: Word boundary padding
464 * @comp_index: Index in the descriptor ring for which this is the completion
465 * @state: LIF state (enum pds_core_lif_state)
466 * @name: LIF name string, 0 terminated
467 * @features: Features (enum pds_core_hw_features)
468 * @rsvd2: Word boundary padding
469 * @color: Color bit
470 */
471 struct pds_core_lif_getattr_comp {
472 u8 status;
473 u8 rsvd;
474 __le16 comp_index;
475 union {
476 u8 state;
477 __le64 features;
478 u8 rsvd2[11];
479 } __packed;
480 u8 color;
481 };
482
483 /**
484 * union pds_core_q_identity - Queue identity information
485 * @version: Queue type version that can be used with FW
486 * @supported: Bitfield of queue versions, first bit = ver 0
487 * @rsvd: Word boundary padding
488 * @features: Queue features
489 * @desc_sz: Descriptor size
490 * @comp_sz: Completion descriptor size
491 * @rsvd2: Word boundary padding
492 */
493 struct pds_core_q_identity {
494 u8 version;
495 u8 supported;
496 u8 rsvd[6];
497 #define PDS_CORE_QIDENT_F_CQ 0x01 /* queue has completion ring */
498 __le64 features;
499 __le16 desc_sz;
500 __le16 comp_sz;
501 u8 rsvd2[6];
502 };
503
504 /**
505 * struct pds_core_q_identify_cmd - queue identify command
506 * @opcode: Opcode PDS_AQ_CMD_Q_IDENTIFY
507 * @type: Logical queue type (enum pds_core_logical_qtype)
508 * @client_id: Client identifier
509 * @ver: Highest queue type version that the driver supports
510 * @rsvd: Word boundary padding
511 * @ident_pa: DMA address to receive the data (struct pds_core_q_identity)
512 */
513 struct pds_core_q_identify_cmd {
514 u8 opcode;
515 u8 type;
516 __le16 client_id;
517 u8 ver;
518 u8 rsvd[3];
519 __le64 ident_pa;
520 };
521
522 /**
523 * struct pds_core_q_identify_comp - queue identify command completion
524 * @status: Status of the command (enum pds_core_status_code)
525 * @rsvd: Word boundary padding
526 * @comp_index: Index in the descriptor ring for which this is the completion
527 * @ver: Queue type version that can be used with FW
528 * @rsvd1: Word boundary padding
529 * @color: Color bit
530 */
531 struct pds_core_q_identify_comp {
532 u8 status;
533 u8 rsvd;
534 __le16 comp_index;
535 u8 ver;
536 u8 rsvd1[10];
537 u8 color;
538 };
539
540 /**
541 * struct pds_core_q_init_cmd - Queue init command
542 * @opcode: Opcode PDS_AQ_CMD_Q_INIT
543 * @type: Logical queue type
544 * @client_id: Client identifier
545 * @ver: Queue type version
546 * @rsvd: Word boundary padding
547 * @index: (LIF, qtype) relative admin queue index
548 * @intr_index: Interrupt control register index, or Event queue index
549 * @pid: Process ID
550 * @flags:
551 * IRQ: Interrupt requested on completion
552 * ENA: Enable the queue. If ENA=0 the queue is initialized
553 * but remains disabled, to be later enabled with the
554 * Queue Enable command. If ENA=1, then queue is
555 * initialized and then enabled.
556 * @cos: Class of service for this queue
557 * @ring_size: Queue ring size, encoded as a log2(size), in
558 * number of descriptors. The actual ring size is
559 * (1 << ring_size). For example, to select a ring size
560 * of 64 descriptors write ring_size = 6. The minimum
561 * ring_size value is 2 for a ring of 4 descriptors.
562 * The maximum ring_size value is 12 for a ring of 4k
563 * descriptors. Values of ring_size <2 and >12 are
564 * reserved.
565 * @ring_base: Queue ring base address
566 * @cq_ring_base: Completion queue ring base address
567 */
568 struct pds_core_q_init_cmd {
569 u8 opcode;
570 u8 type;
571 __le16 client_id;
572 u8 ver;
573 u8 rsvd[3];
574 __le32 index;
575 __le16 pid;
576 __le16 intr_index;
577 __le16 flags;
578 #define PDS_CORE_QINIT_F_IRQ 0x01 /* Request interrupt on completion */
579 #define PDS_CORE_QINIT_F_ENA 0x02 /* Enable the queue */
580 u8 cos;
581 #define PDS_CORE_QSIZE_MIN_LG2 2
582 #define PDS_CORE_QSIZE_MAX_LG2 12
583 u8 ring_size;
584 __le64 ring_base;
585 __le64 cq_ring_base;
586 } __packed;
587
588 /**
589 * struct pds_core_q_init_comp - Queue init command completion
590 * @status: Status of the command (enum pds_core_status_code)
591 * @rsvd: Word boundary padding
592 * @comp_index: Index in the descriptor ring for which this is the completion
593 * @hw_index: Hardware Queue ID
594 * @hw_type: Hardware Queue type
595 * @rsvd2: Word boundary padding
596 * @color: Color
597 */
598 struct pds_core_q_init_comp {
599 u8 status;
600 u8 rsvd;
601 __le16 comp_index;
602 __le32 hw_index;
603 u8 hw_type;
604 u8 rsvd2[6];
605 u8 color;
606 };
607
608 /*
609 * enum pds_vdpa_cmd_opcode - vDPA Device commands
610 */
611 enum pds_vdpa_cmd_opcode {
612 PDS_VDPA_CMD_INIT = 48,
613 PDS_VDPA_CMD_IDENT = 49,
614 PDS_VDPA_CMD_RESET = 51,
615 PDS_VDPA_CMD_VQ_RESET = 52,
616 PDS_VDPA_CMD_VQ_INIT = 53,
617 PDS_VDPA_CMD_STATUS_UPDATE = 54,
618 PDS_VDPA_CMD_SET_FEATURES = 55,
619 PDS_VDPA_CMD_SET_ATTR = 56,
620 };
621
622 /**
623 * struct pds_vdpa_cmd - generic command
624 * @opcode: Opcode
625 * @vdpa_index: Index for vdpa subdevice
626 * @vf_id: VF id
627 */
628 struct pds_vdpa_cmd {
629 u8 opcode;
630 u8 vdpa_index;
631 __le16 vf_id;
632 };
633
634 /**
635 * struct pds_vdpa_init_cmd - INIT command
636 * @opcode: Opcode PDS_VDPA_CMD_INIT
637 * @vdpa_index: Index for vdpa subdevice
638 * @vf_id: VF id
639 */
640 struct pds_vdpa_init_cmd {
641 u8 opcode;
642 u8 vdpa_index;
643 __le16 vf_id;
644 };
645
646 /**
647 * struct pds_vdpa_ident - vDPA identification data
648 * @hw_features: vDPA features supported by device
649 * @max_vqs: max queues available (2 queues for a single queuepair)
650 * @max_qlen: log(2) of maximum number of descriptors
651 * @min_qlen: log(2) of minimum number of descriptors
652 *
653 * This struct is used in a DMA block that is set up for the PDS_VDPA_CMD_IDENT
654 * transaction. Set up the DMA block and send the address in the IDENT cmd
655 * data, the DSC will write the ident information, then we can remove the DMA
656 * block after reading the answer. If the completion status is 0, then there
657 * is valid information, else there was an error and the data should be invalid.
658 */
659 struct pds_vdpa_ident {
660 __le64 hw_features;
661 __le16 max_vqs;
662 __le16 max_qlen;
663 __le16 min_qlen;
664 };
665
666 /**
667 * struct pds_vdpa_ident_cmd - IDENT command
668 * @opcode: Opcode PDS_VDPA_CMD_IDENT
669 * @rsvd: Word boundary padding
670 * @vf_id: VF id
671 * @len: length of ident info DMA space
672 * @ident_pa: address for DMA of ident info (struct pds_vdpa_ident)
673 * only used for this transaction, then forgotten by DSC
674 */
675 struct pds_vdpa_ident_cmd {
676 u8 opcode;
677 u8 rsvd;
678 __le16 vf_id;
679 __le32 len;
680 __le64 ident_pa;
681 };
682
683 /**
684 * struct pds_vdpa_status_cmd - STATUS_UPDATE command
685 * @opcode: Opcode PDS_VDPA_CMD_STATUS_UPDATE
686 * @vdpa_index: Index for vdpa subdevice
687 * @vf_id: VF id
688 * @status: new status bits
689 */
690 struct pds_vdpa_status_cmd {
691 u8 opcode;
692 u8 vdpa_index;
693 __le16 vf_id;
694 u8 status;
695 };
696
697 /**
698 * enum pds_vdpa_attr - List of VDPA device attributes
699 * @PDS_VDPA_ATTR_MAC: MAC address
700 * @PDS_VDPA_ATTR_MAX_VQ_PAIRS: Max virtqueue pairs
701 */
702 enum pds_vdpa_attr {
703 PDS_VDPA_ATTR_MAC = 1,
704 PDS_VDPA_ATTR_MAX_VQ_PAIRS = 2,
705 };
706
707 /**
708 * struct pds_vdpa_setattr_cmd - SET_ATTR command
709 * @opcode: Opcode PDS_VDPA_CMD_SET_ATTR
710 * @vdpa_index: Index for vdpa subdevice
711 * @vf_id: VF id
712 * @attr: attribute to be changed (enum pds_vdpa_attr)
713 * @pad: Word boundary padding
714 * @mac: new mac address to be assigned as vdpa device address
715 * @max_vq_pairs: new limit of virtqueue pairs
716 */
717 struct pds_vdpa_setattr_cmd {
718 u8 opcode;
719 u8 vdpa_index;
720 __le16 vf_id;
721 u8 attr;
722 u8 pad[3];
723 union {
724 u8 mac[6];
725 __le16 max_vq_pairs;
726 } __packed;
727 };
728
729 /**
730 * struct pds_vdpa_vq_init_cmd - queue init command
731 * @opcode: Opcode PDS_VDPA_CMD_VQ_INIT
732 * @vdpa_index: Index for vdpa subdevice
733 * @vf_id: VF id
734 * @qid: Queue id (bit0 clear = rx, bit0 set = tx, qid=N is ctrlq)
735 * @len: log(2) of max descriptor count
736 * @desc_addr: DMA address of descriptor area
737 * @avail_addr: DMA address of available descriptors (aka driver area)
738 * @used_addr: DMA address of used descriptors (aka device area)
739 * @intr_index: interrupt index
740 * @avail_index: initial device position in available ring
741 * @used_index: initial device position in used ring
742 */
743 struct pds_vdpa_vq_init_cmd {
744 u8 opcode;
745 u8 vdpa_index;
746 __le16 vf_id;
747 __le16 qid;
748 __le16 len;
749 __le64 desc_addr;
750 __le64 avail_addr;
751 __le64 used_addr;
752 __le16 intr_index;
753 __le16 avail_index;
754 __le16 used_index;
755 };
756
757 /**
758 * struct pds_vdpa_vq_init_comp - queue init completion
759 * @status: Status of the command (enum pds_core_status_code)
760 * @hw_qtype: HW queue type, used in doorbell selection
761 * @hw_qindex: HW queue index, used in doorbell selection
762 * @rsvd: Word boundary padding
763 * @color: Color bit
764 */
765 struct pds_vdpa_vq_init_comp {
766 u8 status;
767 u8 hw_qtype;
768 __le16 hw_qindex;
769 u8 rsvd[11];
770 u8 color;
771 };
772
773 /**
774 * struct pds_vdpa_vq_reset_cmd - queue reset command
775 * @opcode: Opcode PDS_VDPA_CMD_VQ_RESET
776 * @vdpa_index: Index for vdpa subdevice
777 * @vf_id: VF id
778 * @qid: Queue id
779 */
780 struct pds_vdpa_vq_reset_cmd {
781 u8 opcode;
782 u8 vdpa_index;
783 __le16 vf_id;
784 __le16 qid;
785 };
786
787 /**
788 * struct pds_vdpa_vq_reset_comp - queue reset completion
789 * @status: Status of the command (enum pds_core_status_code)
790 * @rsvd0: Word boundary padding
791 * @avail_index: current device position in available ring
792 * @used_index: current device position in used ring
793 * @rsvd: Word boundary padding
794 * @color: Color bit
795 */
796 struct pds_vdpa_vq_reset_comp {
797 u8 status;
798 u8 rsvd0;
799 __le16 avail_index;
800 __le16 used_index;
801 u8 rsvd[9];
802 u8 color;
803 };
804
805 /**
806 * struct pds_vdpa_set_features_cmd - set hw features
807 * @opcode: Opcode PDS_VDPA_CMD_SET_FEATURES
808 * @vdpa_index: Index for vdpa subdevice
809 * @vf_id: VF id
810 * @rsvd: Word boundary padding
811 * @features: Feature bit mask
812 */
813 struct pds_vdpa_set_features_cmd {
814 u8 opcode;
815 u8 vdpa_index;
816 __le16 vf_id;
817 __le32 rsvd;
818 __le64 features;
819 };
820
821 #define PDS_LM_DEVICE_STATE_LENGTH 65536
822 #define PDS_LM_CHECK_DEVICE_STATE_LENGTH(X) \
823 PDS_CORE_SIZE_CHECK(union, PDS_LM_DEVICE_STATE_LENGTH, X)
824
825 /*
826 * enum pds_lm_cmd_opcode - Live Migration Device commands
827 */
828 enum pds_lm_cmd_opcode {
829 PDS_LM_CMD_HOST_VF_STATUS = 1,
830
831 /* Device state commands */
832 PDS_LM_CMD_STATE_SIZE = 16,
833 PDS_LM_CMD_SUSPEND = 18,
834 PDS_LM_CMD_SUSPEND_STATUS = 19,
835 PDS_LM_CMD_RESUME = 20,
836 PDS_LM_CMD_SAVE = 21,
837 PDS_LM_CMD_RESTORE = 22,
838
839 /* Dirty page tracking commands */
840 PDS_LM_CMD_DIRTY_STATUS = 32,
841 PDS_LM_CMD_DIRTY_ENABLE = 33,
842 PDS_LM_CMD_DIRTY_DISABLE = 34,
843 PDS_LM_CMD_DIRTY_READ_SEQ = 35,
844 PDS_LM_CMD_DIRTY_WRITE_ACK = 36,
845 };
846
847 /**
848 * struct pds_lm_cmd - generic command
849 * @opcode: Opcode
850 * @rsvd: Word boundary padding
851 * @vf_id: VF id
852 * @rsvd2: Structure padding to 60 Bytes
853 */
854 struct pds_lm_cmd {
855 u8 opcode;
856 u8 rsvd;
857 __le16 vf_id;
858 u8 rsvd2[56];
859 };
860
861 /**
862 * struct pds_lm_state_size_cmd - STATE_SIZE command
863 * @opcode: Opcode
864 * @rsvd: Word boundary padding
865 * @vf_id: VF id
866 */
867 struct pds_lm_state_size_cmd {
868 u8 opcode;
869 u8 rsvd;
870 __le16 vf_id;
871 };
872
873 /**
874 * struct pds_lm_state_size_comp - STATE_SIZE command completion
875 * @status: Status of the command (enum pds_core_status_code)
876 * @rsvd: Word boundary padding
877 * @comp_index: Index in the desc ring for which this is the completion
878 * @size: Size of the device state
879 * @rsvd2: Word boundary padding
880 * @color: Color bit
881 */
882 struct pds_lm_state_size_comp {
883 u8 status;
884 u8 rsvd;
885 __le16 comp_index;
886 union {
887 __le64 size;
888 u8 rsvd2[11];
889 } __packed;
890 u8 color;
891 };
892
893 enum pds_lm_suspend_resume_type {
894 PDS_LM_SUSPEND_RESUME_TYPE_FULL = 0,
895 PDS_LM_SUSPEND_RESUME_TYPE_P2P = 1,
896 };
897
898 /**
899 * struct pds_lm_suspend_cmd - SUSPEND command
900 * @opcode: Opcode PDS_LM_CMD_SUSPEND
901 * @rsvd: Word boundary padding
902 * @vf_id: VF id
903 * @type: Type of suspend (enum pds_lm_suspend_resume_type)
904 */
905 struct pds_lm_suspend_cmd {
906 u8 opcode;
907 u8 rsvd;
908 __le16 vf_id;
909 u8 type;
910 };
911
912 /**
913 * struct pds_lm_suspend_status_cmd - SUSPEND status command
914 * @opcode: Opcode PDS_AQ_CMD_LM_SUSPEND_STATUS
915 * @rsvd: Word boundary padding
916 * @vf_id: VF id
917 * @type: Type of suspend (enum pds_lm_suspend_resume_type)
918 */
919 struct pds_lm_suspend_status_cmd {
920 u8 opcode;
921 u8 rsvd;
922 __le16 vf_id;
923 u8 type;
924 };
925
926 /**
927 * struct pds_lm_resume_cmd - RESUME command
928 * @opcode: Opcode PDS_LM_CMD_RESUME
929 * @rsvd: Word boundary padding
930 * @vf_id: VF id
931 * @type: Type of resume (enum pds_lm_suspend_resume_type)
932 */
933 struct pds_lm_resume_cmd {
934 u8 opcode;
935 u8 rsvd;
936 __le16 vf_id;
937 u8 type;
938 };
939
940 /**
941 * struct pds_lm_sg_elem - Transmit scatter-gather (SG) descriptor element
942 * @addr: DMA address of SG element data buffer
943 * @len: Length of SG element data buffer, in bytes
944 * @rsvd: Word boundary padding
945 */
946 struct pds_lm_sg_elem {
947 __le64 addr;
948 __le32 len;
949 __le16 rsvd[2];
950 };
951
952 /**
953 * struct pds_lm_save_cmd - SAVE command
954 * @opcode: Opcode PDS_LM_CMD_SAVE
955 * @rsvd: Word boundary padding
956 * @vf_id: VF id
957 * @rsvd2: Word boundary padding
958 * @sgl_addr: IOVA address of the SGL to dma the device state
959 * @num_sge: Total number of SG elements
960 */
961 struct pds_lm_save_cmd {
962 u8 opcode;
963 u8 rsvd;
964 __le16 vf_id;
965 u8 rsvd2[4];
966 __le64 sgl_addr;
967 __le32 num_sge;
968 } __packed;
969
970 /**
971 * struct pds_lm_restore_cmd - RESTORE command
972 * @opcode: Opcode PDS_LM_CMD_RESTORE
973 * @rsvd: Word boundary padding
974 * @vf_id: VF id
975 * @rsvd2: Word boundary padding
976 * @sgl_addr: IOVA address of the SGL to dma the device state
977 * @num_sge: Total number of SG elements
978 */
979 struct pds_lm_restore_cmd {
980 u8 opcode;
981 u8 rsvd;
982 __le16 vf_id;
983 u8 rsvd2[4];
984 __le64 sgl_addr;
985 __le32 num_sge;
986 } __packed;
987
988 /**
989 * union pds_lm_dev_state - device state information
990 * @words: Device state words
991 */
992 union pds_lm_dev_state {
993 __le32 words[PDS_LM_DEVICE_STATE_LENGTH / sizeof(__le32)];
994 };
995
996 enum pds_lm_host_vf_status {
997 PDS_LM_STA_NONE = 0,
998 PDS_LM_STA_IN_PROGRESS,
999 PDS_LM_STA_MAX,
1000 };
1001
1002 /**
1003 * struct pds_lm_dirty_region_info - Memory region info for STATUS and ENABLE
1004 * @dma_base: Base address of the DMA-contiguous memory region
1005 * @page_count: Number of pages in the memory region
1006 * @page_size_log2: Log2 page size in the memory region
1007 * @rsvd: Word boundary padding
1008 */
1009 struct pds_lm_dirty_region_info {
1010 __le64 dma_base;
1011 __le32 page_count;
1012 u8 page_size_log2;
1013 u8 rsvd[3];
1014 };
1015
1016 /**
1017 * struct pds_lm_dirty_status_cmd - DIRTY_STATUS command
1018 * @opcode: Opcode PDS_LM_CMD_DIRTY_STATUS
1019 * @rsvd: Word boundary padding
1020 * @vf_id: VF id
1021 * @max_regions: Capacity of the region info buffer
1022 * @rsvd2: Word boundary padding
1023 * @regions_dma: DMA address of the region info buffer
1024 *
1025 * The minimum of max_regions (from the command) and num_regions (from the
1026 * completion) of struct pds_lm_dirty_region_info will be written to
1027 * regions_dma.
1028 *
1029 * The max_regions may be zero, in which case regions_dma is ignored. In that
1030 * case, the completion will only report the maximum number of regions
1031 * supported by the device, and the number of regions currently enabled.
1032 */
1033 struct pds_lm_dirty_status_cmd {
1034 u8 opcode;
1035 u8 rsvd;
1036 __le16 vf_id;
1037 u8 max_regions;
1038 u8 rsvd2[3];
1039 __le64 regions_dma;
1040 } __packed;
1041
1042 /**
1043 * enum pds_lm_dirty_bmp_type - Type of dirty page bitmap
1044 * @PDS_LM_DIRTY_BMP_TYPE_NONE: No bitmap / disabled
1045 * @PDS_LM_DIRTY_BMP_TYPE_SEQ_ACK: Seq/Ack bitmap representation
1046 */
1047 enum pds_lm_dirty_bmp_type {
1048 PDS_LM_DIRTY_BMP_TYPE_NONE = 0,
1049 PDS_LM_DIRTY_BMP_TYPE_SEQ_ACK = 1,
1050 };
1051
1052 /**
1053 * struct pds_lm_dirty_status_comp - STATUS command completion
1054 * @status: Status of the command (enum pds_core_status_code)
1055 * @rsvd: Word boundary padding
1056 * @comp_index: Index in the desc ring for which this is the completion
1057 * @max_regions: Maximum number of regions supported by the device
1058 * @num_regions: Number of regions currently enabled
1059 * @bmp_type: Type of dirty bitmap representation
1060 * @rsvd2: Word boundary padding
1061 * @bmp_type_mask: Mask of supported bitmap types, bit index per type
1062 * @rsvd3: Word boundary padding
1063 * @color: Color bit
1064 *
1065 * This completion descriptor is used for STATUS, ENABLE, and DISABLE.
1066 */
1067 struct pds_lm_dirty_status_comp {
1068 u8 status;
1069 u8 rsvd;
1070 __le16 comp_index;
1071 u8 max_regions;
1072 u8 num_regions;
1073 u8 bmp_type;
1074 u8 rsvd2;
1075 __le32 bmp_type_mask;
1076 u8 rsvd3[3];
1077 u8 color;
1078 };
1079
1080 /**
1081 * struct pds_lm_dirty_enable_cmd - DIRTY_ENABLE command
1082 * @opcode: Opcode PDS_LM_CMD_DIRTY_ENABLE
1083 * @rsvd: Word boundary padding
1084 * @vf_id: VF id
1085 * @bmp_type: Type of dirty bitmap representation
1086 * @num_regions: Number of entries in the region info buffer
1087 * @rsvd2: Word boundary padding
1088 * @regions_dma: DMA address of the region info buffer
1089 *
1090 * The num_regions must be nonzero, and less than or equal to the maximum
1091 * number of regions supported by the device.
1092 *
1093 * The memory regions should not overlap.
1094 *
1095 * The information should be initialized by the driver. The device may modify
1096 * the information on successful completion, such as by size-aligning the
1097 * number of pages in a region.
1098 *
1099 * The modified number of pages will be greater than or equal to the page count
1100 * given in the enable command, and at least as coarsly aligned as the given
1101 * value. For example, the count might be aligned to a multiple of 64, but
1102 * if the value is already a multiple of 128 or higher, it will not change.
1103 * If the driver requires its own minimum alignment of the number of pages, the
1104 * driver should account for that already in the region info of this command.
1105 *
1106 * This command uses struct pds_lm_dirty_status_comp for its completion.
1107 */
1108 struct pds_lm_dirty_enable_cmd {
1109 u8 opcode;
1110 u8 rsvd;
1111 __le16 vf_id;
1112 u8 bmp_type;
1113 u8 num_regions;
1114 u8 rsvd2[2];
1115 __le64 regions_dma;
1116 } __packed;
1117
1118 /**
1119 * struct pds_lm_dirty_disable_cmd - DIRTY_DISABLE command
1120 * @opcode: Opcode PDS_LM_CMD_DIRTY_DISABLE
1121 * @rsvd: Word boundary padding
1122 * @vf_id: VF id
1123 *
1124 * Dirty page tracking will be disabled. This may be called in any state, as
1125 * long as dirty page tracking is supported by the device, to ensure that dirty
1126 * page tracking is disabled.
1127 *
1128 * This command uses struct pds_lm_dirty_status_comp for its completion. On
1129 * success, num_regions will be zero.
1130 */
1131 struct pds_lm_dirty_disable_cmd {
1132 u8 opcode;
1133 u8 rsvd;
1134 __le16 vf_id;
1135 };
1136
1137 /**
1138 * struct pds_lm_dirty_seq_ack_cmd - DIRTY_READ_SEQ or _WRITE_ACK command
1139 * @opcode: Opcode PDS_LM_CMD_DIRTY_[READ_SEQ|WRITE_ACK]
1140 * @rsvd: Word boundary padding
1141 * @vf_id: VF id
1142 * @off_bytes: Byte offset in the bitmap
1143 * @len_bytes: Number of bytes to transfer
1144 * @num_sge: Number of DMA scatter gather elements
1145 * @rsvd2: Word boundary padding
1146 * @sgl_addr: DMA address of scatter gather list
1147 *
1148 * Read bytes from the SEQ bitmap, or write bytes into the ACK bitmap.
1149 *
1150 * This command treats the entire bitmap as a byte buffer. It does not
1151 * distinguish between guest memory regions. The driver should refer to the
1152 * number of pages in each region, according to PDS_LM_CMD_DIRTY_STATUS, to
1153 * determine the region boundaries in the bitmap. Each region will be
1154 * represented by exactly the number of bits as the page count for that region,
1155 * immediately following the last bit of the previous region.
1156 */
1157 struct pds_lm_dirty_seq_ack_cmd {
1158 u8 opcode;
1159 u8 rsvd;
1160 __le16 vf_id;
1161 __le32 off_bytes;
1162 __le32 len_bytes;
1163 __le16 num_sge;
1164 u8 rsvd2[2];
1165 __le64 sgl_addr;
1166 } __packed;
1167
1168 /**
1169 * struct pds_lm_host_vf_status_cmd - HOST_VF_STATUS command
1170 * @opcode: Opcode PDS_LM_CMD_HOST_VF_STATUS
1171 * @rsvd: Word boundary padding
1172 * @vf_id: VF id
1173 * @status: Current LM status of host VF driver (enum pds_lm_host_status)
1174 */
1175 struct pds_lm_host_vf_status_cmd {
1176 u8 opcode;
1177 u8 rsvd;
1178 __le16 vf_id;
1179 u8 status;
1180 };
1181
1182 union pds_core_adminq_cmd {
1183 u8 opcode;
1184 u8 bytes[64];
1185
1186 struct pds_core_client_reg_cmd client_reg;
1187 struct pds_core_client_unreg_cmd client_unreg;
1188 struct pds_core_client_request_cmd client_request;
1189
1190 struct pds_core_lif_identify_cmd lif_ident;
1191 struct pds_core_lif_init_cmd lif_init;
1192 struct pds_core_lif_reset_cmd lif_reset;
1193 struct pds_core_lif_setattr_cmd lif_setattr;
1194 struct pds_core_lif_getattr_cmd lif_getattr;
1195
1196 struct pds_core_q_identify_cmd q_ident;
1197 struct pds_core_q_init_cmd q_init;
1198
1199 struct pds_vdpa_cmd vdpa;
1200 struct pds_vdpa_init_cmd vdpa_init;
1201 struct pds_vdpa_ident_cmd vdpa_ident;
1202 struct pds_vdpa_status_cmd vdpa_status;
1203 struct pds_vdpa_setattr_cmd vdpa_setattr;
1204 struct pds_vdpa_set_features_cmd vdpa_set_features;
1205 struct pds_vdpa_vq_init_cmd vdpa_vq_init;
1206 struct pds_vdpa_vq_reset_cmd vdpa_vq_reset;
1207
1208 struct pds_lm_suspend_cmd lm_suspend;
1209 struct pds_lm_suspend_status_cmd lm_suspend_status;
1210 struct pds_lm_resume_cmd lm_resume;
1211 struct pds_lm_state_size_cmd lm_state_size;
1212 struct pds_lm_save_cmd lm_save;
1213 struct pds_lm_restore_cmd lm_restore;
1214 struct pds_lm_host_vf_status_cmd lm_host_vf_status;
1215 struct pds_lm_dirty_status_cmd lm_dirty_status;
1216 struct pds_lm_dirty_enable_cmd lm_dirty_enable;
1217 struct pds_lm_dirty_disable_cmd lm_dirty_disable;
1218 struct pds_lm_dirty_seq_ack_cmd lm_dirty_seq_ack;
1219 };
1220
1221 union pds_core_adminq_comp {
1222 struct {
1223 u8 status;
1224 u8 rsvd;
1225 __le16 comp_index;
1226 u8 rsvd2[11];
1227 u8 color;
1228 };
1229 u32 words[4];
1230
1231 struct pds_core_client_reg_comp client_reg;
1232
1233 struct pds_core_lif_identify_comp lif_ident;
1234 struct pds_core_lif_init_comp lif_init;
1235 struct pds_core_lif_setattr_comp lif_setattr;
1236 struct pds_core_lif_getattr_comp lif_getattr;
1237
1238 struct pds_core_q_identify_comp q_ident;
1239 struct pds_core_q_init_comp q_init;
1240
1241 struct pds_vdpa_vq_init_comp vdpa_vq_init;
1242 struct pds_vdpa_vq_reset_comp vdpa_vq_reset;
1243
1244 struct pds_lm_state_size_comp lm_state_size;
1245 struct pds_lm_dirty_status_comp lm_dirty_status;
1246 };
1247
1248 #ifndef __CHECKER__
1249 static_assert(sizeof(union pds_core_adminq_cmd) == 64);
1250 static_assert(sizeof(union pds_core_adminq_comp) == 16);
1251 static_assert(sizeof(union pds_core_notifyq_comp) == 64);
1252 #endif /* __CHECKER__ */
1253
1254 /* The color bit is a 'done' bit for the completion descriptors
1255 * where the meaning alternates between '1' and '0' for alternating
1256 * passes through the completion descriptor ring.
1257 */
pdsc_color_match(u8 color,bool done_color)1258 static inline bool pdsc_color_match(u8 color, bool done_color)
1259 {
1260 return (!!(color & PDS_COMP_COLOR_MASK)) == done_color;
1261 }
1262
1263 struct pdsc;
1264 int pdsc_adminq_post(struct pdsc *pdsc,
1265 union pds_core_adminq_cmd *cmd,
1266 union pds_core_adminq_comp *comp,
1267 bool fast_poll);
1268
1269 #endif /* _PDS_CORE_ADMINQ_H_ */
1270
