Searched refs:PCIE_USB3_PHY_PLL_CTL_OFF (Results 1 – 1 of 1) sorted by relevance
20 #define PCIE_USB3_PHY_PLL_CTL_OFF 0x7c macro66 writel(PCIE_USB3_PHY_ENABLE, data->regs + PCIE_USB3_PHY_PLL_CTL_OFF); in phy_usb3_mode_set()90 val = readl(data->regs + PCIE_USB3_PHY_PLL_CTL_OFF); in phy_pcie_mode_set()92 writel(val, data->regs + PCIE_USB3_PHY_PLL_CTL_OFF); in phy_pcie_mode_set()
