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Searched refs:PCIE (Results 1 – 25 of 55) sorted by relevance

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/Linux-v6.6/Documentation/admin-guide/perf/
Dnvidia-pmu.rst12 * PCIE
32 strongly-ordered (SO) PCIE write traffic to local/remote memory. Please see
63 PCIE device of the remote SoC.
122 The CNVLink PMU monitors traffic from GPU and PCIE device on remote sockets
123 to local memory. For PCIE traffic, this PMU captures read and relaxed ordered
139 traffic from remote GPU and PCIE devices.
160 PCIE PMU
163 The PCIE PMU monitors all read/write traffic from PCIE root ports to
201 * : PCIE : * * : PCIE : *
233 | Local | PCIE |NVLink-C2C0|NVLink-C2C1| SCF | SCF PMU | CNVLink |
[all …]
/Linux-v6.6/drivers/net/wireless/broadcom/brcm80211/brcmfmac/
Dpcie.c703 brcmf_dbg(PCIE, "config offset 0x%04x, value 0x%04x\n", in brcmf_pcie_reset_device()
774 brcmf_dbg(PCIE, "MB transaction is already pending 0x%04x\n", in brcmf_pcie_send_mb_data()
813 brcmf_dbg(PCIE, "D2H_MB_DATA: 0x%04x\n", dtoh_mb_data); in brcmf_pcie_handle_mb_data()
815 brcmf_dbg(PCIE, "D2H_MB_DATA: DEEP SLEEP REQ\n"); in brcmf_pcie_handle_mb_data()
817 brcmf_dbg(PCIE, "D2H_MB_DATA: sent DEEP SLEEP ACK\n"); in brcmf_pcie_handle_mb_data()
820 brcmf_dbg(PCIE, "D2H_MB_DATA: DEEP SLEEP EXIT\n"); in brcmf_pcie_handle_mb_data()
822 brcmf_dbg(PCIE, "D2H_MB_DATA: D3 ACK\n"); in brcmf_pcie_handle_mb_data()
827 brcmf_dbg(PCIE, "D2H_MB_DATA: FW HALT\n"); in brcmf_pcie_handle_mb_data()
932 brcmf_dbg(PCIE, "Enter\n"); in brcmf_pcie_quick_check_isr()
946 brcmf_dbg(PCIE, "Enter %x\n", status); in brcmf_pcie_isr_thread()
[all …]
DKconfig41 bool "PCIE bus interface support for FullMAC driver"
47 This option enables the PCIE bus interface support for Broadcom
49 use the driver for an PCIE wireless card.
/Linux-v6.6/drivers/phy/amlogic/
DKconfig64 tristate "Meson G12A USB3+PCIE Combo PHY driver"
70 Enable this to support the Meson USB3 + PCIE Combo PHY found
75 tristate "Meson AXG PCIE PHY driver"
81 Enable this to support the Meson MIPI + PCIE PHY found
86 tristate "Meson AXG MIPI + PCIE analog PHY driver"
93 Enable this to support the Meson MIPI + PCIE analog PHY
/Linux-v6.6/drivers/infiniband/hw/hfi1/
Dchip_registers.h20 #define PCIE 0 macro
584 #define PCI_CFG_MSIX0 (PCIE + 0x0000000000B0)
585 #define PCI_CFG_REG1 (PCIE + 0x000000000004)
586 #define PCI_CFG_REG11 (PCIE + 0x00000000002C)
587 #define PCIE_CFG_SPCIE1 (PCIE + 0x00000000014C)
588 #define PCIE_CFG_SPCIE2 (PCIE + 0x000000000150)
589 #define PCIE_CFG_TPH2 (PCIE + 0x000000000180)
1269 #define PCIE_CFG_REG_PL2 (PCIE + 0x000000000708)
1270 #define PCIE_CFG_REG_PL3 (PCIE + 0x00000000070C)
1273 #define PCIE_CFG_REG_PL102 (PCIE + 0x000000000898)
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/Linux-v6.6/drivers/net/ethernet/huawei/hinic/
DKconfig7 tristate "Huawei Intelligent PCIE Network Interface Card"
11 This driver supports HiNIC PCIE Ethernet cards.
/Linux-v6.6/drivers/phy/st/
Dphy-spear1310-miphy.c98 PCIE, enumerator
156 if (priv->mode == PCIE) in spear1310_miphy_init()
167 if (priv->mode == PCIE) in spear1310_miphy_exit()
197 if (priv->mode != SATA && priv->mode != PCIE) { in spear1310_miphy_xlate()
Dphy-spear1340-miphy.c77 PCIE, enumerator
164 else if (priv->mode == PCIE) in spear1340_miphy_init()
177 else if (priv->mode == PCIE) in spear1340_miphy_exit()
234 if (priv->mode != SATA && priv->mode != PCIE) { in spear1340_miphy_xlate()
DKconfig10 Enable this to support the miphy transceiver (for SATA/PCIE/USB3)
/Linux-v6.6/Documentation/devicetree/bindings/net/wireless/
Dmarvell-8xxx.txt1 Marvell 8787/8897/8978/8997 (sd8787/sd8897/sd8978/sd8997/pcie8997) SDIO/PCIE devices
4 This node provides properties for controlling the Marvell SDIO/PCIE wireless device.
5 The node is expected to be specified as a child node to the SDIO/PCIE controller that
/Linux-v6.6/drivers/soc/loongson/
DKconfig11 The global utilities block controls PCIE device enabling, alternate
13 and PCIE, configuration of memory controller, rtc controller, lio
/Linux-v6.6/drivers/phy/freescale/
DKconfig31 tristate "Freescale i.MX8M PCIE PHY"
35 Enable this to add support for the PCIE PHY as found on
/Linux-v6.6/Documentation/translations/zh_CN/mm/
Dhmm.rst67 如果我们只考虑 PCIE 总线,那么设备可以访问主内存(通常通过 IOMMU)并与 CPU 缓存一
72 另一个严重的因素是带宽有限(约 32GBytes/s,PCIE 4.0 和 16 通道)。这比最快的 GPU
76 一些平台正在开发新的 I/O 总线或对 PCIE 的添加/修改以解决其中一些限制
/Linux-v6.6/arch/arm/boot/dts/nxp/imx/
Dimx6qdl-mba6.dtsi94 /* PCIE.PWR_EN */
495 MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x001b0f0 /* #PCIE.WAKE */
496 MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x001b0f0 /* #PCIE.RST */
497 MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x001b0f0 /* #PCIE.DIS */
525 MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x00130f0 /* PCIE.PWR_EN */
/Linux-v6.6/arch/arm/boot/dts/aspeed/
Daspeed-bmc-tyan-s7106.dts360 * - 0,0: PCIE slot 1, SMB #1
361 * - 0,1: PCIE slot 1, SMB #2
362 * - 1,0: PCIE slot 2, SMB #1
363 * - 1,1: PCIE slot 2, SMB #2
/Linux-v6.6/Documentation/devicetree/bindings/phy/
Drockchip-pcie-phy.txt1 Rockchip PCIE PHY
Dphy-hi3798cv200-combphy.txt1 HiSilicon STB PCIE/SATA/USB3 PHY
/Linux-v6.6/drivers/perf/hisilicon/
DKconfig10 tristate "HiSilicon PCIE PERF PMU"
/Linux-v6.6/arch/arm64/boot/dts/xilinx/
Dzynqmp-zcu102-revA.dts250 output-low; /* PCIE = 0, DP = 1 */
256 output-high; /* PCIE = 0, DP = 1 */
262 output-high; /* PCIE = 0, USB0 = 1 */
268 output-high; /* PCIE = 0, SATA = 1 */
556 /* refclk4 for PS-GT, used for PCIE slot */
561 /* refclk5 for PS-GT, used for PCIE */
/Linux-v6.6/drivers/phy/starfive/
DKconfig19 tristate "Starfive JH7110 PCIE 2.0/USB 3.0 PHY support"
/Linux-v6.6/drivers/net/can/sja1000/
DKconfig25 tristate "Fintek F81601 PCIE to 2 CAN Controller"
28 This driver adds support for Fintek F81601 PCIE to 2 CAN
/Linux-v6.6/drivers/net/wireless/ath/ath11k/
DKconfig28 This module adds support for PCIE bus
/Linux-v6.6/drivers/net/wireless/marvell/mwifiex/
DKconfig26 tristate "Marvell WiFi-Ex Driver for PCIE 8766/8897/8997"
/Linux-v6.6/arch/arm64/boot/dts/renesas/
Dsalvator-xs.dtsi37 line-name = "PCIE/SATA switch";
/Linux-v6.6/drivers/pinctrl/tegra/
Dpinctrl-tegra30.c2401 …PINGROUP(pex_l2_rst_n_pcc6, PCIE, HDA, RSVD3, RSVD4, 0x33d8, N, …
2402 …PINGROUP(pex_l2_clkreq_n_pcc7, PCIE, HDA, RSVD3, RSVD4, 0x33dc, N, …
2403 …PINGROUP(pex_l0_prsnt_n_pdd0, PCIE, HDA, RSVD3, RSVD4, 0x33b8, N, …
2404 …PINGROUP(pex_l0_rst_n_pdd1, PCIE, HDA, RSVD3, RSVD4, 0x33bc, N, …
2405 …PINGROUP(pex_l0_clkreq_n_pdd2, PCIE, HDA, RSVD3, RSVD4, 0x33c0, N, …
2406 …PINGROUP(pex_wake_n_pdd3, PCIE, HDA, RSVD3, RSVD4, 0x33c4, N, …
2407 …PINGROUP(pex_l1_prsnt_n_pdd4, PCIE, HDA, RSVD3, RSVD4, 0x33c8, N, …
2408 …PINGROUP(pex_l1_rst_n_pdd5, PCIE, HDA, RSVD3, RSVD4, 0x33cc, N, …
2409 …PINGROUP(pex_l1_clkreq_n_pdd6, PCIE, HDA, RSVD3, RSVD4, 0x33d0, N, …
2410 …PINGROUP(pex_l2_prsnt_n_pdd7, PCIE, HDA, RSVD3, RSVD4, 0x33d4, N, …

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