Searched refs:PCC (Results 1 – 16 of 16) sorted by relevance
86 * pcc-cpufreq.txt - PCC interface documentation100 1.1 PCC interface113 Processor Clocking Control (PCC) is an interface between the platform117 The PCC driver (pcc-cpufreq) allows OSPM to take advantage of the PCC120 OS utilizes the PCC interface to inform platform firmware what frequency the126 1.1 PCC interface:128 The complete PCC specification is available here:131 PCC relies on a shared memory region that provides a channel for communication132 between the OS and platform firmware. PCC also implements a "doorbell" that136 The ACPI PCCH() method is used to discover the location of the PCC shared[all …]
231 SIOF0, SIOF1, MMC, PCC, enumerator262 INTC_VECT(CMT, 0xf00), INTC_VECT(PCC, 0xf60),275 { 0xA4080006UL, 0, 16, 4, /* IPRI */ { SIOF0, SIOF1, MMC, PCC } },
273 select PCC551 bool "ACPI PCC Address Space"552 depends on PCC555 The PCC Address Space also referred as PCC Operation Region pertains556 to the region of PCC subspace that succeeds the PCC signature.558 The PCC Operation Region works in conjunction with the PCC Table559 (Platform Communications Channel Table). PCC subspaces that are560 marked for use as PCC Operation Regions must not be used as PCC562 MPST. These standard features must always use the PCC Table instead.564 Enable this feature if you want to set up and install the PCC Address[all …]
244 USBH, USBF, TPU, PCC, MMCIF, SIM, enumerator281 INTC_VECT(TPU, 0xcc0), INTC_VECT(PCC, 0xce0),310 PCC, 0, 0, ADC, TPU, SIM, SIOF2, SIOF1,329 { 0xffd400ac, 0, 32, 8, /* INT2PRI11 */ { PCC } },
14 For ACPI, it is the PCC mailbox.
50 REG_GET_FIELD(mc_status, MCA_UMC_UMC0_MCUMC_STATUST0, PCC) == 1 || in amdgpu_mca_query_uncorrectable_error_count()
137 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, PCC) == 1 || in umc_v8_10_query_uncorrectable_error_count()374 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, PCC) == 1 || in umc_v8_10_ecc_info_query_uncorrectable_error_count()
84 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, PCC) == 1 || in umc_v8_7_ecc_info_querry_uncorrectable_error_count()295 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, PCC) == 1 || in umc_v8_7_querry_uncorrectable_error_count()
154 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, PCC) == 1 || in umc_v6_7_ecc_info_querry_uncorrectable_error_count()352 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, PCC) == 1 || in umc_v6_7_querry_uncorrectable_error_count()
248 REG_GET_FIELD(mc_umc_status, MCA_UMC_UMC0_MCUMC_STATUST0, PCC) == 1 || in umc_v6_1_querry_uncorrectable_error_count()
101 config PCC config108 (PCC) is typically used by CPPC (ACPI CPU Performance management),111 PCC clients mentioned above.
27 This driver adds support for the PCC interface.
325 Recommend for use on arm64; use of PCC is recommended when using CPPC332 This table describes PCC channels used to gather debug logs of
235 - If the system contains controllers using PCC channel, the239 and communicates with the host via PCC, the PDTT (Platform Debug Trigger
2354 depends on XGENE_SLIMPRO_MBOX || PCC
340 ACPI PCC(Platform Communication Channel) MAILBOX DRIVER
