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Searched refs:PA_CL_CLIP_CNTL__PS_UCP_MODE_MASK (Results 1 – 13 of 13) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h5576 #define PA_CL_CLIP_CNTL__PS_UCP_MODE_MASK 0x0000c000L macro
Dgfx_7_2_sh_mask.h5579 #define PA_CL_CLIP_CNTL__PS_UCP_MODE_MASK 0xc000 macro
Dgfx_8_0_sh_mask.h6367 #define PA_CL_CLIP_CNTL__PS_UCP_MODE_MASK 0xc000 macro
Dgfx_8_1_sh_mask.h6901 #define PA_CL_CLIP_CNTL__PS_UCP_MODE_MASK 0xc000 macro
/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h16915 #define PA_CL_CLIP_CNTL__PS_UCP_MODE_MASK … macro
Dgc_9_1_sh_mask.h18224 #define PA_CL_CLIP_CNTL__PS_UCP_MODE_MASK … macro
Dgc_9_2_1_sh_mask.h18100 #define PA_CL_CLIP_CNTL__PS_UCP_MODE_MASK … macro
Dgc_9_4_3_sh_mask.h20226 #define PA_CL_CLIP_CNTL__PS_UCP_MODE_MASK … macro
Dgc_9_4_2_sh_mask.h10347 #define PA_CL_CLIP_CNTL__PS_UCP_MODE_MASK … macro
Dgc_11_0_0_sh_mask.h22119 #define PA_CL_CLIP_CNTL__PS_UCP_MODE_MASK … macro
Dgc_10_1_0_sh_mask.h24411 #define PA_CL_CLIP_CNTL__PS_UCP_MODE_MASK … macro
Dgc_11_0_3_sh_mask.h24449 #define PA_CL_CLIP_CNTL__PS_UCP_MODE_MASK … macro
Dgc_10_3_0_sh_mask.h22600 #define PA_CL_CLIP_CNTL__PS_UCP_MODE_MASK … macro