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Searched refs:OTG3_OTG_CONTROL__OTG_FIELD_NUMBER_POLARITY_MASK (Results 1 – 12 of 12) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_1_sh_mask.h25642 #define OTG3_OTG_CONTROL__OTG_FIELD_NUMBER_POLARITY_MASK … macro
Ddcn_2_1_0_sh_mask.h30094 #define OTG3_OTG_CONTROL__OTG_FIELD_NUMBER_POLARITY_MASK … macro
Ddcn_3_2_1_sh_mask.h26990 #define OTG3_OTG_CONTROL__OTG_FIELD_NUMBER_POLARITY_MASK … macro
Ddcn_1_0_sh_mask.h24153 #define OTG3_OTG_CONTROL__OTG_FIELD_NUMBER_POLARITY_MASK … macro
Ddcn_3_1_5_sh_mask.h29871 #define OTG3_OTG_CONTROL__OTG_FIELD_NUMBER_POLARITY_MASK … macro
Ddcn_3_1_2_sh_mask.h31933 #define OTG3_OTG_CONTROL__OTG_FIELD_NUMBER_POLARITY_MASK … macro
Ddcn_3_0_2_sh_mask.h28990 #define OTG3_OTG_CONTROL__OTG_FIELD_NUMBER_POLARITY_MASK … macro
Ddcn_3_1_4_sh_mask.h33833 #define OTG3_OTG_CONTROL__OTG_FIELD_NUMBER_POLARITY_MASK … macro
Ddcn_3_1_6_sh_mask.h32699 #define OTG3_OTG_CONTROL__OTG_FIELD_NUMBER_POLARITY_MASK … macro
Ddcn_3_0_0_sh_mask.h32518 #define OTG3_OTG_CONTROL__OTG_FIELD_NUMBER_POLARITY_MASK … macro
Ddcn_2_0_0_sh_mask.h33433 #define OTG3_OTG_CONTROL__OTG_FIELD_NUMBER_POLARITY_MASK … macro
Ddcn_3_2_0_sh_mask.h26987 #define OTG3_OTG_CONTROL__OTG_FIELD_NUMBER_POLARITY_MASK … macro