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Searched refs:OTG0_OTG_CONTROL__OTG_FIELD_NUMBER_POLARITY_MASK (Results 1 – 14 of 14) sorted by relevance

/Linux-v6.6/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_sh_mask.h14349 #define OTG0_OTG_CONTROL__OTG_FIELD_NUMBER_POLARITY_MASK … macro
Ddcn_3_0_3_sh_mask.h14456 #define OTG0_OTG_CONTROL__OTG_FIELD_NUMBER_POLARITY_MASK … macro
Ddcn_3_0_1_sh_mask.h23164 #define OTG0_OTG_CONTROL__OTG_FIELD_NUMBER_POLARITY_MASK … macro
Ddcn_2_1_0_sh_mask.h27580 #define OTG0_OTG_CONTROL__OTG_FIELD_NUMBER_POLARITY_MASK … macro
Ddcn_3_2_1_sh_mask.h24581 #define OTG0_OTG_CONTROL__OTG_FIELD_NUMBER_POLARITY_MASK … macro
Ddcn_1_0_sh_mask.h21711 #define OTG0_OTG_CONTROL__OTG_FIELD_NUMBER_POLARITY_MASK … macro
Ddcn_3_1_5_sh_mask.h27516 #define OTG0_OTG_CONTROL__OTG_FIELD_NUMBER_POLARITY_MASK … macro
Ddcn_3_1_2_sh_mask.h29491 #define OTG0_OTG_CONTROL__OTG_FIELD_NUMBER_POLARITY_MASK … macro
Ddcn_3_0_2_sh_mask.h26512 #define OTG0_OTG_CONTROL__OTG_FIELD_NUMBER_POLARITY_MASK … macro
Ddcn_3_1_4_sh_mask.h31424 #define OTG0_OTG_CONTROL__OTG_FIELD_NUMBER_POLARITY_MASK … macro
Ddcn_3_1_6_sh_mask.h30257 #define OTG0_OTG_CONTROL__OTG_FIELD_NUMBER_POLARITY_MASK … macro
Ddcn_3_0_0_sh_mask.h30043 #define OTG0_OTG_CONTROL__OTG_FIELD_NUMBER_POLARITY_MASK … macro
Ddcn_2_0_0_sh_mask.h30931 #define OTG0_OTG_CONTROL__OTG_FIELD_NUMBER_POLARITY_MASK … macro
Ddcn_3_2_0_sh_mask.h24578 #define OTG0_OTG_CONTROL__OTG_FIELD_NUMBER_POLARITY_MASK … macro